feat(v2): scaffold hardware/v1 frozen baseline + M1 Neural Processor
Begins the V2 Neural Multiprocessor / Dataflow architecture per docs/v2-description.md, per explicit user request to freeze V1 and start V2 development, copying from V1 what's needed. Scaffold: - hardware/v1/: byte-exact, read-only copy of the current V1 codebase (rtl, testbenches, tools, constraints, a representative subset of synthesis results, and reference docs) -- verified identical via diff/cmp against the live top-level tree before being made filesystem-read-only. The live top-level tree is untouched and remains the project's "production" V1 (see hardware/v1/README.md and hardware/v2/logs/decisions.log DEC-0001 for why copy-not-move). - hardware/v2/: mandatory structure (rtl/sim/constraints/synthesis/ reports/scripts/logs/docs) plus the full logging system required by the spec (development/architecture/simulation/synthesis/timing/ benchmark/decisions/experiments/errors.log). M1 -- Neural Processor (hardware/v2/rtl/neural_processor.v): - 8-stage pipelined perceptron unit (P_IN=8): input align, 8 multipliers, 3-level adder tree, accumulator, bias+activation, INT8 saturation. Genuine 1-tile/cycle throughput, not just a wider combinational datapath. - 7-state FSM (NP_IDLE..NP_ERROR per docs/v2-description.md §6, with 4 baseline states merged into NP_WAIT_OPERANDS -- see decisions.log DEC-0002); valid/ready/data/last stream interfaces per §7. - Bit-exact vs the frozen hardware/v1/rtl/neuron_parallel.v + mac8.v + mac_unit.v: 7/7 tests pass (hardware/v2/sim/tb_neural_processor.v), covering regular/mixed-sign/extreme-INT8 vectors, both activations, a zero-idle-gap back-to-back-tiles throughput check, and an 8-tile job -- verified with Verilator (see below for why). - Real synthesis + place&route (Yosys + nextpnr-ecp5): 0 CHECK problems, Fmax 183.12 MHz at ACC_WIDTH=32 (PASS at 80MHz, ~3x V1's isolated PARALLEL=8 Fmax of 61.71 MHz) and 176.21 MHz at ACC_WIDTH=24 (a user-requested comparison experiment, also bit-exact-verified; see experiments.log EXP-0001/EXP-0002 and benchmark.log). Three real bugs found and resolved during M1 development (full diagnostic record in errors.log): - Two independent, reproducible Icarus Verilog v13.0 scheduling defects (ERR-0001, ERR-0002) that silently produced wrong simulation results for standard sequential Verilog -- confirmed via Verilator 5.050 giving correct results on the same minimal repros. Verilator is now the trusted simulator for hardware/v2/ (decisions.log DEC-0004); Icarus's affected protocol-violation check was removed from the RTL and deferred architecturally to the Neural Director (DEC-0003) rather than chased further. - One real RTL bug (ERR-0003): last0 wasn't gated like valid0, letting a "last tile" tag leak into the pipeline ahead of its actual valid tile on back-to-back jobs. Fixed and verified. Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_013xXuuRUWZScuo1DeYJxs3v
This commit is contained in:
Claude Sonnet 5
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#!/usr/bin/env python3
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"""
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netasm CLI: compiles a .netasm source file (see parser.py's docstring
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for the grammar) into an SPI load sequence + human-readable debug
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dump. Host-side tool only -- see rtl/graph_engine.v / spi_engine.v
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for the hardware side of this protocol.
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Usage:
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python3 -m tools.netasm.cli input.netasm -o out_prefix \\
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[--parallel 8] [--max-conn 32] [--n-total 4096]
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Produces:
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out_prefix.frames.bin -- length-prefixed SPI transaction bytes
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out_prefix.debug.txt -- human-readable id/address/byte dump
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"""
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from __future__ import annotations
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import argparse
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import sys
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try:
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from . import frames as F
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from .assembler import (
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NetasmError,
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assemble_dense,
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assemble_graph,
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dump_dense_debug,
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dump_graph_debug,
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)
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from .parser import DenseNet, GraphNet, NetasmSyntaxError, parse
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except ImportError:
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# Allow running this file directly (`python3 tools/netasm/cli.py`)
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# without the package being importable as `tools.netasm` -- e.g.
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# an unrelated `tools` namespace package earlier on PYTHONPATH
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# shadowing this repo's tools/ directory.
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import os
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import sys
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sys.path.insert(0, os.path.dirname(os.path.abspath(__file__)))
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import frames as F
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from assembler import (
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NetasmError,
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assemble_dense,
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assemble_graph,
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dump_dense_debug,
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dump_graph_debug,
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)
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from parser import DenseNet, GraphNet, NetasmSyntaxError, parse
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def main(argv=None) -> int:
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ap = argparse.ArgumentParser(description=__doc__)
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ap.add_argument("source", help="path to a .netasm source file")
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ap.add_argument("-o", "--output", required=True, help="output file prefix")
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ap.add_argument("--parallel", type=int, default=8, help="hardware PARALLEL (default 8)")
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ap.add_argument("--max-conn", type=int, default=32, help="graph_engine's MAX_CONN (default 32)")
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ap.add_argument("--n-total", type=int, default=4096, help="graph_engine's N_TOTAL (default 4096)")
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ap.add_argument("--table-base", type=lambda s: int(s, 0), default=0x000000)
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ap.add_argument("--edges-base", type=lambda s: int(s, 0), default=0x010000)
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ap.add_argument("--x-base", type=lambda s: int(s, 0), default=0x000000)
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ap.add_argument("--out-base", type=lambda s: int(s, 0), default=0x020000,
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help="graph out_base / dense buf_a_base")
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ap.add_argument("--buf-b-base", type=lambda s: int(s, 0), default=0x021000,
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help="dense buf_b_base only")
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ap.add_argument("--weights-base", type=lambda s: int(s, 0), default=0x010000,
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help="dense weight/bias region base")
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args = ap.parse_args(argv)
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with open(args.source, "r") as f:
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text = f.read()
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try:
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net = parse(text)
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except NetasmSyntaxError as e:
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print(f"{args.source}: syntax error: {e}", file=sys.stderr)
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return 1
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try:
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if isinstance(net, GraphNet):
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layout = assemble_graph(
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net,
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parallel=args.parallel,
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max_conn=args.max_conn,
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n_total=args.n_total,
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table_base=args.table_base,
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edges_base=args.edges_base,
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x_base=args.x_base,
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out_base=args.out_base,
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)
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debug = dump_graph_debug(layout)
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frames = layout.frames
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else:
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assert isinstance(net, DenseNet)
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layout = assemble_dense(
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net,
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parallel=args.parallel,
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table_base=args.table_base,
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weights_base=args.weights_base,
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x_base=args.x_base,
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buf_a_base=args.out_base,
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buf_b_base=args.buf_b_base,
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)
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debug = dump_dense_debug(layout)
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frames = layout.frames
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except NetasmError as e:
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print(f"{args.source}: assembly error: {e}", file=sys.stderr)
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return 1
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F.dump_frames(frames, args.output + ".frames.bin")
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with open(args.output + ".debug.txt", "w") as f:
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f.write(debug + "\n")
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print(f"wrote {args.output}.frames.bin ({sum(len(fr.data) for fr in frames)} payload bytes, "
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f"{len(frames)} SPI transactions)")
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print(f"wrote {args.output}.debug.txt")
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return 0
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if __name__ == "__main__":
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sys.exit(main())
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