#! /opt/homebrew/Cellar/icarus-verilog/13.0/bin/vvp
:ivl_version "13.0 (stable)" "(v13_0)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision - 12;
:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/system.vpi";
:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/vhdl_sys.vpi";
:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/vhdl_textio.vpi";
:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/v2005_math.vpi";
:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/va_math.vpi";
:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/v2009.vpi";
S_0x1029eff90 .scope package, "$unit" "$unit" 2 1;
 .timescale 0 0;
S_0x1029f10d0 .scope module, "tb" "tb" 3 3;
 .timescale -9 -12;
P_0x1029f0b10 .param/l "ACC_WIDTH" 0 3 10, +C4<00000000000000000000000000101000>;
P_0x1029f0b50 .param/l "DATA_WIDTH" 0 3 5, +C4<00000000000000000000000000010000>;
P_0x1029f0b90 .param/l "FRAC_BITS" 0 3 6, +C4<00000000000000000000000000001000>;
P_0x1029f0bd0 .param/l "N_INPUTS" 0 3 7, +C4<00000000000000000000000000100000>;
P_0x1029f0c10 .param/l "N_NEURONS" 0 3 8, +C4<00000000000000000000000000000100>;
P_0x1029f0c50 .param/l "PARALLEL" 0 3 9, +C4<00000000000000000000000000100000>;
v0xb4cde1fe0_0 .var/s "bias_bus", 63 0;
v0xb4cde2080_0 .net "busy", 0 0, L_0xb4d265a40;  1 drivers
v0xb4cde2120_0 .var "clk", 0 0;
v0xb4cde21c0_0 .net "done", 0 0, L_0xb4d265ae0;  1 drivers
v0xb4cde2260_0 .var/i "errors", 31 0;
v0xb4cde2300_0 .var/i "expected", 31 0;
v0xb4cde23a0_0 .var/i "i", 31 0;
v0xb4cde2440_0 .var "rst", 0 0;
v0xb4cde24e0_0 .var "start", 0 0;
v0xb4cde2580_0 .var/s "weights_bus", 2047 0;
v0xb4cde2620_0 .var/s "x_bus", 511 0;
v0xb4cde26c0_0 .net/s "y_bus", 63 0, L_0xb4ce0bf20;  1 drivers
S_0x1029f0550 .scope module, "dut" "layer" 3 42, 4 1 0, S_0x1029f10d0;
 .timescale 0 0;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst";
    .port_info 2 /INPUT 1 "start";
    .port_info 3 /INPUT 512 "x_bus";
    .port_info 4 /INPUT 2048 "weights_bus";
    .port_info 5 /INPUT 64 "bias_bus";
    .port_info 6 /OUTPUT 64 "y_bus";
    .port_info 7 /OUTPUT 1 "busy";
    .port_info 8 /OUTPUT 1 "done";
P_0x1029e7580 .param/l "ACC_WIDTH" 0 4 7, +C4<00000000000000000000000000101000>;
P_0x1029e75c0 .param/l "DATA_WIDTH" 0 4 2, +C4<00000000000000000000000000010000>;
P_0x1029e7600 .param/l "FRAC_BITS" 0 4 3, +C4<00000000000000000000000000001000>;
P_0x1029e7640 .param/l "N_INPUTS" 0 4 4, +C4<00000000000000000000000000100000>;
P_0x1029e7680 .param/l "N_NEURONS" 0 4 5, +C4<00000000000000000000000000000100>;
P_0x1029e76c0 .param/l "PARALLEL" 0 4 6, +C4<00000000000000000000000000100000>;
v0xb4cde17c0_0 .net/s "bias_bus", 63 0, v0xb4cde1fe0_0;  1 drivers
v0xb4cde1860_0 .net "busy", 0 0, L_0xb4d265a40;  alias, 1 drivers
v0xb4cde1900_0 .net "clk", 0 0, v0xb4cde2120_0;  1 drivers
v0xb4cde19a0_0 .net "done", 0 0, L_0xb4d265ae0;  alias, 1 drivers
v0xb4cde1a40_0 .net "neuron_busy", 3 0, L_0xb4ce10000;  1 drivers
v0xb4cde1ae0_0 .net "neuron_done", 3 0, L_0xb4ce100a0;  1 drivers
v0xb4cde1b80_0 .net "rst", 0 0, v0xb4cde2440_0;  1 drivers
v0xb4cde1c20_0 .net "start", 0 0, v0xb4cde24e0_0;  1 drivers
v0xb4cde1cc0_0 .net/s "weights_bus", 2047 0, v0xb4cde2580_0;  1 drivers
v0xb4cde1d60_0 .net/s "x_bus", 511 0, v0xb4cde2620_0;  1 drivers
v0xb4cde1e00_0 .net/s "y_bus", 63 0, L_0xb4ce0bf20;  alias, 1 drivers
L_0xb4d24d900 .part v0xb4cde2580_0, 0, 512;
L_0xb4d24d9a0 .part v0xb4cde1fe0_0, 0, 16;
L_0xb4d256e40 .part v0xb4cde2580_0, 512, 512;
L_0xb4d256ee0 .part v0xb4cde1fe0_0, 16, 16;
L_0xb4d2603c0 .part v0xb4cde2580_0, 1024, 512;
L_0xb4d260460 .part v0xb4cde1fe0_0, 32, 16;
L_0xb4d265900 .part v0xb4cde2580_0, 1536, 512;
L_0xb4d2659a0 .part v0xb4cde1fe0_0, 48, 16;
L_0xb4ce0bf20 .concat8 [ 16 16 16 16], v0xb4cda2bc0_0, v0xb4cdb4fa0_0, v0xb4cdc7340_0, v0xb4cde1720_0;
L_0xb4ce10000 .concat8 [ 1 1 1 1], v0xb4cda2440_0, v0xb4cdb4820_0, v0xb4cdc6bc0_0, v0xb4cde0fa0_0;
L_0xb4ce100a0 .concat8 [ 1 1 1 1], v0xb4cda2580_0, v0xb4cdb4960_0, v0xb4cdc6d00_0, v0xb4cde10e0_0;
L_0xb4d265a40 .reduce/or L_0xb4ce10000;
L_0xb4d265ae0 .reduce/and L_0xb4ce100a0;
S_0x1029e7700 .scope generate, "GEN_NEURON[0]" "GEN_NEURON[0]" 4 35, 4 35 0, S_0x1029f0550;
 .timescale 0 0;
P_0xb4cc2fdc0 .param/l "n" 1 4 35, +C4<00>;
S_0x1029e24b0 .scope module, "u_neuron" "neuron_parallel" 4 43, 5 1 0, S_0x1029e7700;
 .timescale 0 0;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst";
    .port_info 2 /INPUT 1 "start";
    .port_info 3 /INPUT 512 "x_bus";
    .port_info 4 /INPUT 512 "w_bus";
    .port_info 5 /INPUT 16 "bias";
    .port_info 6 /OUTPUT 16 "y";
    .port_info 7 /OUTPUT 1 "busy";
    .port_info 8 /OUTPUT 1 "done";
P_0x1029e2630 .param/l "ACC_WIDTH" 0 5 6, +C4<00000000000000000000000000101000>;
P_0x1029e2670 .param/l "DATA_WIDTH" 0 5 2, +C4<00000000000000000000000000010000>;
P_0x1029e26b0 .param/l "FRAC_BITS" 0 5 3, +C4<00000000000000000000000000001000>;
P_0x1029e26f0 .param/l "GROUPS" 1 5 21, +C4<00000000000000000000000000000001>;
P_0x1029e2730 .param/l "GROUP_INDEX_WIDTH" 1 5 22, +C4<00000000000000000000000000000001>;
P_0x1029e2770 .param/l "N_INPUTS" 0 5 4, +C4<00000000000000000000000000100000>;
P_0x1029e27b0 .param/l "PARALLEL" 0 5 5, +C4<00000000000000000000000000100000>;
L_0x1029f2710 .functor BUFZ 16, L_0xb4d24d9a0, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v0xb4cda15e0_0 .net *"_ivl_0", 31 0, L_0xb4cde2760;  1 drivers
v0xb4cda1680_0 .net *"_ivl_11", 31 0, L_0xb4cde28a0;  1 drivers
v0xb4cda1720_0 .net *"_ivl_14", 31 0, L_0xb4cde2940;  1 drivers
L_0xb4c8540e8 .functor BUFT 1, C4<0000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda17c0_0 .net *"_ivl_17", 30 0, L_0xb4c8540e8;  1 drivers
L_0xb4c854130 .functor BUFT 1, C4<00000000000000000000000000100000>, C4<0>, C4<0>, C4<0>;
v0xb4cda1860_0 .net/2u *"_ivl_18", 31 0, L_0xb4c854130;  1 drivers
v0xb4cda1900_0 .net *"_ivl_21", 31 0, L_0xb4cde29e0;  1 drivers
L_0xb4c854178 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
v0xb4cda19a0_0 .net/2u *"_ivl_22", 31 0, L_0xb4c854178;  1 drivers
v0xb4cda1a40_0 .net *"_ivl_25", 31 0, L_0xb4cde2a80;  1 drivers
L_0xb4c854010 .functor BUFT 1, C4<0000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda1ae0_0 .net *"_ivl_3", 30 0, L_0xb4c854010;  1 drivers
v0xb4cda1b80_0 .net *"_ivl_31", 0 0, L_0xb4d24d680;  1 drivers
v0xb4cda1c20_0 .net *"_ivl_33", 23 0, L_0xb4d24d720;  1 drivers
v0xb4cda1cc0_0 .net *"_ivl_36", 39 0, L_0xb4cde7c00;  1 drivers
v0xb4cda1d60_0 .net *"_ivl_38", 31 0, L_0xb4d24d7c0;  1 drivers
L_0xb4c854058 .functor BUFT 1, C4<00000000000000000000000000100000>, C4<0>, C4<0>, C4<0>;
v0xb4cda1e00_0 .net/2u *"_ivl_4", 31 0, L_0xb4c854058;  1 drivers
L_0xb4c854ac0 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda1ea0_0 .net *"_ivl_40", 7 0, L_0xb4c854ac0;  1 drivers
v0xb4cda1f40_0 .net *"_ivl_46", 31 0, L_0xb4d24d860;  1 drivers
v0xb4cda1fe0_0 .net *"_ivl_7", 31 0, L_0xb4cde2800;  1 drivers
L_0xb4c8540a0 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
v0xb4cda2080_0 .net/2u *"_ivl_8", 31 0, L_0xb4c8540a0;  1 drivers
v0xb4cda2120_0 .var/s "acc", 39 0;
v0xb4cda21c0_0 .net/s "acc_next", 39 0, L_0xb4d18fde0;  1 drivers
v0xb4cda2260_0 .net/s "bias", 15 0, L_0xb4d24d9a0;  1 drivers
v0xb4cda2300_0 .net/s "bias_ext", 39 0, L_0xb4cde7b60;  1 drivers
v0xb4cda23a0_0 .net/s "bias_ext_small", 15 0, L_0x1029f2710;  1 drivers
v0xb4cda2440_0 .var "busy", 0 0;
v0xb4cda24e0_0 .net "clk", 0 0, v0xb4cde2120_0;  alias, 1 drivers
v0xb4cda2580_0 .var "done", 0 0;
v0xb4cda2620_0 .net/s "final_acc", 39 0, L_0xb4d18fe80;  1 drivers
v0xb4cda26c0_0 .net/s "final_value", 39 0, L_0xb4cde7ca0;  1 drivers
v0xb4cda2760_0 .var "group_index", 0 0;
v0xb4cda2800_0 .net "rst", 0 0, v0xb4cde2440_0;  alias, 1 drivers
v0xb4cda28a0_0 .net "start", 0 0, v0xb4cde24e0_0;  alias, 1 drivers
v0xb4cda2940_0 .net/s "w_bus", 511 0, L_0xb4d24d900;  1 drivers
v0xb4cda29e0_0 .net/s "w_group", 511 0, L_0xb4d1f45a0;  1 drivers
v0xb4cda2a80_0 .net/s "x_bus", 511 0, v0xb4cde2620_0;  alias, 1 drivers
v0xb4cda2b20_0 .net/s "x_group", 511 0, L_0xb4d1f48c0;  1 drivers
v0xb4cda2bc0_0 .var/s "y", 15 0;
E_0xb4d20ce00 .event posedge, v0xb4cda24e0_0;
L_0xb4cde2760 .concat [ 1 31 0 0], v0xb4cda2760_0, L_0xb4c854010;
L_0xb4cde2800 .arith/mult 32, L_0xb4cde2760, L_0xb4c854058;
L_0xb4cde28a0 .arith/mult 32, L_0xb4cde2800, L_0xb4c8540a0;
L_0xb4d1f48c0 .part/v v0xb4cde2620_0, L_0xb4cde28a0, 512;
L_0xb4cde2940 .concat [ 1 31 0 0], v0xb4cda2760_0, L_0xb4c8540e8;
L_0xb4cde29e0 .arith/mult 32, L_0xb4cde2940, L_0xb4c854130;
L_0xb4cde2a80 .arith/mult 32, L_0xb4cde29e0, L_0xb4c854178;
L_0xb4d1f45a0 .part/v L_0xb4d24d900, L_0xb4cde2a80, 512;
L_0xb4d24d680 .part L_0x1029f2710, 15, 1;
L_0xb4d24d720 .repeat 24, 24, L_0xb4d24d680;
L_0xb4cde7b60 .concat [ 16 24 0 0], L_0x1029f2710, L_0xb4d24d720;
L_0xb4d24d7c0 .part L_0xb4cde7b60, 0, 32;
L_0xb4cde7c00 .concat [ 8 32 0 0], L_0xb4c854ac0, L_0xb4d24d7c0;
L_0xb4d18fe80 .arith/sum 40, L_0xb4d18fde0, L_0xb4cde7c00;
L_0xb4d24d860 .part L_0xb4d18fe80, 8, 32;
L_0xb4cde7ca0 .extend/s 40, L_0xb4d24d860;
S_0x1029dc4e0 .scope module, "u_mac8" "mac8" 5 52, 6 1 0, S_0x1029e24b0;
 .timescale 0 0;
    .port_info 0 /INPUT 512 "x_bus";
    .port_info 1 /INPUT 512 "w_bus";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0x1029f06d0 .param/l "ACC_WIDTH" 0 6 3, +C4<00000000000000000000000000101000>;
P_0x1029f0710 .param/l "DATA_WIDTH" 0 6 2, +C4<00000000000000000000000000010000>;
P_0x1029f0750 .param/l "PARALLEL" 0 6 4, +C4<00000000000000000000000000100000>;
v0xb4cda1180_0 .net/s "acc_in", 39 0, v0xb4cda2120_0;  1 drivers
v0xb4cda1220_0 .net/s "acc_out", 39 0, L_0xb4d18fde0;  alias, 1 drivers
v0xb4cda12c0_0 .var/i "j", 31 0;
v0xb4cda1360 .array "products", 31 0;
v0xb4cda1360_0 .net/s v0xb4cda1360 0, 39 0, L_0xb4d18ebc0; 1 drivers
v0xb4cda1360_1 .net/s v0xb4cda1360 1, 39 0, L_0xb4d18ec60; 1 drivers
v0xb4cda1360_2 .net/s v0xb4cda1360 2, 39 0, L_0xb4d18e9e0; 1 drivers
v0xb4cda1360_3 .net/s v0xb4cda1360 3, 39 0, L_0xb4d18ea80; 1 drivers
v0xb4cda1360_4 .net/s v0xb4cda1360 4, 39 0, L_0xb4d18eb20; 1 drivers
v0xb4cda1360_5 .net/s v0xb4cda1360 5, 39 0, L_0xb4d18ed00; 1 drivers
v0xb4cda1360_6 .net/s v0xb4cda1360 6, 39 0, L_0xb4d18eda0; 1 drivers
v0xb4cda1360_7 .net/s v0xb4cda1360 7, 39 0, L_0xb4d18ee40; 1 drivers
v0xb4cda1360_8 .net/s v0xb4cda1360 8, 39 0, L_0xb4d18eee0; 1 drivers
v0xb4cda1360_9 .net/s v0xb4cda1360 9, 39 0, L_0xb4d18ef80; 1 drivers
v0xb4cda1360_10 .net/s v0xb4cda1360 10, 39 0, L_0xb4d18f020; 1 drivers
v0xb4cda1360_11 .net/s v0xb4cda1360 11, 39 0, L_0xb4d18f0c0; 1 drivers
v0xb4cda1360_12 .net/s v0xb4cda1360 12, 39 0, L_0xb4d18f160; 1 drivers
v0xb4cda1360_13 .net/s v0xb4cda1360 13, 39 0, L_0xb4d18f200; 1 drivers
v0xb4cda1360_14 .net/s v0xb4cda1360 14, 39 0, L_0xb4d18f2a0; 1 drivers
v0xb4cda1360_15 .net/s v0xb4cda1360 15, 39 0, L_0xb4d18f340; 1 drivers
v0xb4cda1360_16 .net/s v0xb4cda1360 16, 39 0, L_0xb4d18f3e0; 1 drivers
v0xb4cda1360_17 .net/s v0xb4cda1360 17, 39 0, L_0xb4d18f480; 1 drivers
v0xb4cda1360_18 .net/s v0xb4cda1360 18, 39 0, L_0xb4d18f520; 1 drivers
v0xb4cda1360_19 .net/s v0xb4cda1360 19, 39 0, L_0xb4d18f5c0; 1 drivers
v0xb4cda1360_20 .net/s v0xb4cda1360 20, 39 0, L_0xb4d18f660; 1 drivers
v0xb4cda1360_21 .net/s v0xb4cda1360 21, 39 0, L_0xb4d18f700; 1 drivers
v0xb4cda1360_22 .net/s v0xb4cda1360 22, 39 0, L_0xb4d18f7a0; 1 drivers
v0xb4cda1360_23 .net/s v0xb4cda1360 23, 39 0, L_0xb4d18f840; 1 drivers
v0xb4cda1360_24 .net/s v0xb4cda1360 24, 39 0, L_0xb4d18f8e0; 1 drivers
v0xb4cda1360_25 .net/s v0xb4cda1360 25, 39 0, L_0xb4d18f980; 1 drivers
v0xb4cda1360_26 .net/s v0xb4cda1360 26, 39 0, L_0xb4d18fa20; 1 drivers
v0xb4cda1360_27 .net/s v0xb4cda1360 27, 39 0, L_0xb4d18fac0; 1 drivers
v0xb4cda1360_28 .net/s v0xb4cda1360 28, 39 0, L_0xb4d18fb60; 1 drivers
v0xb4cda1360_29 .net/s v0xb4cda1360 29, 39 0, L_0xb4d18fc00; 1 drivers
v0xb4cda1360_30 .net/s v0xb4cda1360 30, 39 0, L_0xb4d18fca0; 1 drivers
v0xb4cda1360_31 .net/s v0xb4cda1360 31, 39 0, L_0xb4d18fd40; 1 drivers
v0xb4cda1400_0 .var/s "sum", 39 0;
v0xb4cda14a0_0 .net/s "w_bus", 511 0, L_0xb4d1f45a0;  alias, 1 drivers
v0xb4cda1540_0 .net/s "x_bus", 511 0, L_0xb4d1f48c0;  alias, 1 drivers
E_0xb4d20ce40/0 .event anyedge, v0xb4cda1400_0, v0xb4ccdcbe0_0, v0xb4ccdd220_0, v0xb4ccdd860_0;
E_0xb4d20ce40/1 .event anyedge, v0xb4ccddea0_0, v0xb4ccde4e0_0, v0xb4ccdeb20_0, v0xb4ccdf160_0;
E_0xb4d20ce40/2 .event anyedge, v0xb4ccdf7a0_0, v0xb4ccdfde0_0, v0xb4cd94460_0, v0xb4cd94aa0_0;
E_0xb4d20ce40/3 .event anyedge, v0xb4cd950e0_0, v0xb4cd95720_0, v0xb4cd95d60_0, v0xb4cd963a0_0;
E_0xb4d20ce40/4 .event anyedge, v0xb4cd969e0_0, v0xb4cd97020_0, v0xb4cd97660_0, v0xb4cd97ca0_0;
E_0xb4d20ce40/5 .event anyedge, v0xb4cd9c320_0, v0xb4cd9c960_0, v0xb4cd9cfa0_0, v0xb4cd9d5e0_0;
E_0xb4d20ce40/6 .event anyedge, v0xb4cd9dc20_0, v0xb4cd9e260_0, v0xb4cd9e8a0_0, v0xb4cd9eee0_0;
E_0xb4d20ce40/7 .event anyedge, v0xb4cd9f520_0, v0xb4cd9fb60_0, v0xb4cda01e0_0, v0xb4cda0820_0;
E_0xb4d20ce40/8 .event anyedge, v0xb4cda0e60_0;
E_0xb4d20ce40 .event/or E_0xb4d20ce40/0, E_0xb4d20ce40/1, E_0xb4d20ce40/2, E_0xb4d20ce40/3, E_0xb4d20ce40/4, E_0xb4d20ce40/5, E_0xb4d20ce40/6, E_0xb4d20ce40/7, E_0xb4d20ce40/8;
L_0xb4d1f4aa0 .part L_0xb4d1f48c0, 0, 16;
L_0xb4d1f4b40 .part L_0xb4d1f45a0, 0, 16;
L_0xb4d1f4d20 .part L_0xb4d1f48c0, 16, 16;
L_0xb4d1f4dc0 .part L_0xb4d1f45a0, 16, 16;
L_0xb4d1f4fa0 .part L_0xb4d1f48c0, 32, 16;
L_0xb4d1f5040 .part L_0xb4d1f45a0, 32, 16;
L_0xb4d1f5220 .part L_0xb4d1f48c0, 48, 16;
L_0xb4d1f52c0 .part L_0xb4d1f45a0, 48, 16;
L_0xb4d1f54a0 .part L_0xb4d1f48c0, 64, 16;
L_0xb4d1f5540 .part L_0xb4d1f45a0, 64, 16;
L_0xb4d1f5720 .part L_0xb4d1f48c0, 80, 16;
L_0xb4d1f57c0 .part L_0xb4d1f45a0, 80, 16;
L_0xb4d1f59a0 .part L_0xb4d1f48c0, 96, 16;
L_0xb4d1f5a40 .part L_0xb4d1f45a0, 96, 16;
L_0xb4d1f5c20 .part L_0xb4d1f48c0, 112, 16;
L_0xb4d1f5cc0 .part L_0xb4d1f45a0, 112, 16;
L_0xb4d1f5ea0 .part L_0xb4d1f48c0, 128, 16;
L_0xb4d1f5fe0 .part L_0xb4d1f45a0, 128, 16;
L_0xb4d1f61c0 .part L_0xb4d1f48c0, 144, 16;
L_0xb4d1f6260 .part L_0xb4d1f45a0, 144, 16;
L_0xb4d1f6440 .part L_0xb4d1f48c0, 160, 16;
L_0xb4d1f5f40 .part L_0xb4d1f45a0, 160, 16;
L_0xb4d1f6620 .part L_0xb4d1f48c0, 176, 16;
L_0xb4d1f66c0 .part L_0xb4d1f45a0, 176, 16;
L_0xb4d1f68a0 .part L_0xb4d1f48c0, 192, 16;
L_0xb4d1f6940 .part L_0xb4d1f45a0, 192, 16;
L_0xb4d1f6b20 .part L_0xb4d1f48c0, 208, 16;
L_0xb4d1f6bc0 .part L_0xb4d1f45a0, 208, 16;
L_0xb4d1f6da0 .part L_0xb4d1f48c0, 224, 16;
L_0xb4d1f6e40 .part L_0xb4d1f45a0, 224, 16;
L_0xb4d1f7020 .part L_0xb4d1f48c0, 240, 16;
L_0xb4d1f70c0 .part L_0xb4d1f45a0, 240, 16;
L_0xb4d1f72a0 .part L_0xb4d1f48c0, 256, 16;
L_0xb4d1f7340 .part L_0xb4d1f45a0, 256, 16;
L_0xb4d1f7520 .part L_0xb4d1f48c0, 272, 16;
L_0xb4d1f75c0 .part L_0xb4d1f45a0, 272, 16;
L_0xb4d1f77a0 .part L_0xb4d1f48c0, 288, 16;
L_0xb4d1f7840 .part L_0xb4d1f45a0, 288, 16;
L_0xb4d1f7a20 .part L_0xb4d1f48c0, 304, 16;
L_0xb4d1f7ac0 .part L_0xb4d1f45a0, 304, 16;
L_0xb4d1f7ca0 .part L_0xb4d1f48c0, 320, 16;
L_0xb4d1f7d40 .part L_0xb4d1f45a0, 320, 16;
L_0xb4d1f7f20 .part L_0xb4d1f48c0, 336, 16;
L_0xb4d0e8000 .part L_0xb4d1f45a0, 336, 16;
L_0xb4d1b8460 .part L_0xb4d1f48c0, 352, 16;
L_0xb4d174320 .part L_0xb4d1f45a0, 352, 16;
L_0xb4d24c140 .part L_0xb4d1f48c0, 368, 16;
L_0xb4d24c1e0 .part L_0xb4d1f45a0, 368, 16;
L_0xb4d24c3c0 .part L_0xb4d1f48c0, 384, 16;
L_0xb4d24c460 .part L_0xb4d1f45a0, 384, 16;
L_0xb4d24c640 .part L_0xb4d1f48c0, 400, 16;
L_0xb4d24c6e0 .part L_0xb4d1f45a0, 400, 16;
L_0xb4d24c8c0 .part L_0xb4d1f48c0, 416, 16;
L_0xb4d24c960 .part L_0xb4d1f45a0, 416, 16;
L_0xb4d24cb40 .part L_0xb4d1f48c0, 432, 16;
L_0xb4d24cbe0 .part L_0xb4d1f45a0, 432, 16;
L_0xb4d24cdc0 .part L_0xb4d1f48c0, 448, 16;
L_0xb4d24ce60 .part L_0xb4d1f45a0, 448, 16;
L_0xb4d24d040 .part L_0xb4d1f48c0, 464, 16;
L_0xb4d24d0e0 .part L_0xb4d1f45a0, 464, 16;
L_0xb4d24d2c0 .part L_0xb4d1f48c0, 480, 16;
L_0xb4d24d360 .part L_0xb4d1f45a0, 480, 16;
L_0xb4d24d540 .part L_0xb4d1f48c0, 496, 16;
L_0xb4d24d5e0 .part L_0xb4d1f45a0, 496, 16;
L_0xb4d18fde0 .arith/sum 40, v0xb4cda2120_0, v0xb4cda1400_0;
S_0x1029dc660 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cc2fe00 .param/l "i" 1 6 17, +C4<00>;
S_0x1029deae0 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x1029dc660;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0x1029f0c90 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0x1029f0cd0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0x1029f0d10 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4ccdc8c0_0 .net/s *"_ivl_0", 31 0, L_0xb4cde2b20;  1 drivers
v0xb4ccdc960_0 .net/s *"_ivl_2", 31 0, L_0xb4cde2bc0;  1 drivers
v0xb4ccdca00_0 .net *"_ivl_7", 0 0, L_0xb4d1f4960;  1 drivers
v0xb4ccdcaa0_0 .net *"_ivl_9", 7 0, L_0xb4d1f4a00;  1 drivers
L_0xb4c8541c0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4ccdcb40_0 .net/s "acc_in", 39 0, L_0xb4c8541c0;  1 drivers
v0xb4ccdcbe0_0 .net/s "acc_out", 39 0, L_0xb4d18ebc0;  alias, 1 drivers
v0xb4ccdcc80_0 .net/s "product", 31 0, L_0xb4cde2c60;  1 drivers
v0xb4ccdcd20_0 .net/s "product_ext", 39 0, L_0xb4cde2d00;  1 drivers
v0xb4ccdcdc0_0 .net/s "w", 15 0, L_0xb4d1f4b40;  1 drivers
v0xb4ccdce60_0 .net/s "x", 15 0, L_0xb4d1f4aa0;  1 drivers
L_0xb4cde2b20 .extend/s 32, L_0xb4d1f4aa0;
L_0xb4cde2bc0 .extend/s 32, L_0xb4d1f4b40;
L_0xb4cde2c60 .arith/mult 32, L_0xb4cde2b20, L_0xb4cde2bc0;
L_0xb4d1f4960 .part L_0xb4cde2c60, 31, 1;
L_0xb4d1f4a00 .repeat 8, 8, L_0xb4d1f4960;
L_0xb4cde2d00 .concat [ 32 8 0 0], L_0xb4cde2c60, L_0xb4d1f4a00;
L_0xb4d18ebc0 .arith/sum 40, L_0xb4c8541c0, L_0xb4cde2d00;
S_0x1029dec60 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cc2fe40 .param/l "i" 1 6 17, +C4<01>;
S_0x1029e63f0 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x1029dec60;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0x1029f1250 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0x1029f1290 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0x1029f12d0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4ccdcf00_0 .net/s *"_ivl_0", 31 0, L_0xb4cde2da0;  1 drivers
v0xb4ccdcfa0_0 .net/s *"_ivl_2", 31 0, L_0xb4cde2e40;  1 drivers
v0xb4ccdd040_0 .net *"_ivl_7", 0 0, L_0xb4d1f4be0;  1 drivers
v0xb4ccdd0e0_0 .net *"_ivl_9", 7 0, L_0xb4d1f4c80;  1 drivers
L_0xb4c854208 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4ccdd180_0 .net/s "acc_in", 39 0, L_0xb4c854208;  1 drivers
v0xb4ccdd220_0 .net/s "acc_out", 39 0, L_0xb4d18ec60;  alias, 1 drivers
v0xb4ccdd2c0_0 .net/s "product", 31 0, L_0xb4cde2ee0;  1 drivers
v0xb4ccdd360_0 .net/s "product_ext", 39 0, L_0xb4cde2f80;  1 drivers
v0xb4ccdd400_0 .net/s "w", 15 0, L_0xb4d1f4dc0;  1 drivers
v0xb4ccdd4a0_0 .net/s "x", 15 0, L_0xb4d1f4d20;  1 drivers
L_0xb4cde2da0 .extend/s 32, L_0xb4d1f4d20;
L_0xb4cde2e40 .extend/s 32, L_0xb4d1f4dc0;
L_0xb4cde2ee0 .arith/mult 32, L_0xb4cde2da0, L_0xb4cde2e40;
L_0xb4d1f4be0 .part L_0xb4cde2ee0, 31, 1;
L_0xb4d1f4c80 .repeat 8, 8, L_0xb4d1f4be0;
L_0xb4cde2f80 .concat [ 32 8 0 0], L_0xb4cde2ee0, L_0xb4d1f4c80;
L_0xb4d18ec60 .arith/sum 40, L_0xb4c854208, L_0xb4cde2f80;
S_0xb4d220000 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cc2fe80 .param/l "i" 1 6 17, +C4<010>;
S_0xb4d220180 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d220000;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0x1029f0110 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0x1029f0150 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0x1029f0190 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4ccdd540_0 .net/s *"_ivl_0", 31 0, L_0xb4cde3020;  1 drivers
v0xb4ccdd5e0_0 .net/s *"_ivl_2", 31 0, L_0xb4cde30c0;  1 drivers
v0xb4ccdd680_0 .net *"_ivl_7", 0 0, L_0xb4d1f4e60;  1 drivers
v0xb4ccdd720_0 .net *"_ivl_9", 7 0, L_0xb4d1f4f00;  1 drivers
L_0xb4c854250 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4ccdd7c0_0 .net/s "acc_in", 39 0, L_0xb4c854250;  1 drivers
v0xb4ccdd860_0 .net/s "acc_out", 39 0, L_0xb4d18e9e0;  alias, 1 drivers
v0xb4ccdd900_0 .net/s "product", 31 0, L_0xb4cde3160;  1 drivers
v0xb4ccdd9a0_0 .net/s "product_ext", 39 0, L_0xb4cde3200;  1 drivers
v0xb4ccdda40_0 .net/s "w", 15 0, L_0xb4d1f5040;  1 drivers
v0xb4ccddae0_0 .net/s "x", 15 0, L_0xb4d1f4fa0;  1 drivers
L_0xb4cde3020 .extend/s 32, L_0xb4d1f4fa0;
L_0xb4cde30c0 .extend/s 32, L_0xb4d1f5040;
L_0xb4cde3160 .arith/mult 32, L_0xb4cde3020, L_0xb4cde30c0;
L_0xb4d1f4e60 .part L_0xb4cde3160, 31, 1;
L_0xb4d1f4f00 .repeat 8, 8, L_0xb4d1f4e60;
L_0xb4cde3200 .concat [ 32 8 0 0], L_0xb4cde3160, L_0xb4d1f4f00;
L_0xb4d18e9e0 .arith/sum 40, L_0xb4c854250, L_0xb4cde3200;
S_0xb4d220300 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cc2fec0 .param/l "i" 1 6 17, +C4<011>;
S_0xb4d220480 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d220300;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0x1029efc70 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0x1029efcb0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0x1029efcf0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4ccddb80_0 .net/s *"_ivl_0", 31 0, L_0xb4cde32a0;  1 drivers
v0xb4ccddc20_0 .net/s *"_ivl_2", 31 0, L_0xb4cde3340;  1 drivers
v0xb4ccddcc0_0 .net *"_ivl_7", 0 0, L_0xb4d1f50e0;  1 drivers
v0xb4ccddd60_0 .net *"_ivl_9", 7 0, L_0xb4d1f5180;  1 drivers
L_0xb4c854298 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4ccdde00_0 .net/s "acc_in", 39 0, L_0xb4c854298;  1 drivers
v0xb4ccddea0_0 .net/s "acc_out", 39 0, L_0xb4d18ea80;  alias, 1 drivers
v0xb4ccddf40_0 .net/s "product", 31 0, L_0xb4cde33e0;  1 drivers
v0xb4ccddfe0_0 .net/s "product_ext", 39 0, L_0xb4cde3480;  1 drivers
v0xb4ccde080_0 .net/s "w", 15 0, L_0xb4d1f52c0;  1 drivers
v0xb4ccde120_0 .net/s "x", 15 0, L_0xb4d1f5220;  1 drivers
L_0xb4cde32a0 .extend/s 32, L_0xb4d1f5220;
L_0xb4cde3340 .extend/s 32, L_0xb4d1f52c0;
L_0xb4cde33e0 .arith/mult 32, L_0xb4cde32a0, L_0xb4cde3340;
L_0xb4d1f50e0 .part L_0xb4cde33e0, 31, 1;
L_0xb4d1f5180 .repeat 8, 8, L_0xb4d1f50e0;
L_0xb4cde3480 .concat [ 32 8 0 0], L_0xb4cde33e0, L_0xb4d1f5180;
L_0xb4d18ea80 .arith/sum 40, L_0xb4c854298, L_0xb4cde3480;
S_0xb4d220600 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cc2ff00 .param/l "i" 1 6 17, +C4<0100>;
S_0xb4d220780 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d220600;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0x1029f2650 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0x1029f2690 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0x1029f26d0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4ccde1c0_0 .net/s *"_ivl_0", 31 0, L_0xb4cde3520;  1 drivers
v0xb4ccde260_0 .net/s *"_ivl_2", 31 0, L_0xb4cde35c0;  1 drivers
v0xb4ccde300_0 .net *"_ivl_7", 0 0, L_0xb4d1f5360;  1 drivers
v0xb4ccde3a0_0 .net *"_ivl_9", 7 0, L_0xb4d1f5400;  1 drivers
L_0xb4c8542e0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4ccde440_0 .net/s "acc_in", 39 0, L_0xb4c8542e0;  1 drivers
v0xb4ccde4e0_0 .net/s "acc_out", 39 0, L_0xb4d18eb20;  alias, 1 drivers
v0xb4ccde580_0 .net/s "product", 31 0, L_0xb4cde3660;  1 drivers
v0xb4ccde620_0 .net/s "product_ext", 39 0, L_0xb4cde3700;  1 drivers
v0xb4ccde6c0_0 .net/s "w", 15 0, L_0xb4d1f5540;  1 drivers
v0xb4ccde760_0 .net/s "x", 15 0, L_0xb4d1f54a0;  1 drivers
L_0xb4cde3520 .extend/s 32, L_0xb4d1f54a0;
L_0xb4cde35c0 .extend/s 32, L_0xb4d1f5540;
L_0xb4cde3660 .arith/mult 32, L_0xb4cde3520, L_0xb4cde35c0;
L_0xb4d1f5360 .part L_0xb4cde3660, 31, 1;
L_0xb4d1f5400 .repeat 8, 8, L_0xb4d1f5360;
L_0xb4cde3700 .concat [ 32 8 0 0], L_0xb4cde3660, L_0xb4d1f5400;
L_0xb4d18eb20 .arith/sum 40, L_0xb4c8542e0, L_0xb4cde3700;
S_0xb4d220900 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cc2ff40 .param/l "i" 1 6 17, +C4<0101>;
S_0xb4d220a80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d220900;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8c000 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8c040 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8c080 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4ccde800_0 .net/s *"_ivl_0", 31 0, L_0xb4cde37a0;  1 drivers
v0xb4ccde8a0_0 .net/s *"_ivl_2", 31 0, L_0xb4cde3840;  1 drivers
v0xb4ccde940_0 .net *"_ivl_7", 0 0, L_0xb4d1f55e0;  1 drivers
v0xb4ccde9e0_0 .net *"_ivl_9", 7 0, L_0xb4d1f5680;  1 drivers
L_0xb4c854328 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4ccdea80_0 .net/s "acc_in", 39 0, L_0xb4c854328;  1 drivers
v0xb4ccdeb20_0 .net/s "acc_out", 39 0, L_0xb4d18ed00;  alias, 1 drivers
v0xb4ccdebc0_0 .net/s "product", 31 0, L_0xb4cde38e0;  1 drivers
v0xb4ccdec60_0 .net/s "product_ext", 39 0, L_0xb4cde3980;  1 drivers
v0xb4ccded00_0 .net/s "w", 15 0, L_0xb4d1f57c0;  1 drivers
v0xb4ccdeda0_0 .net/s "x", 15 0, L_0xb4d1f5720;  1 drivers
L_0xb4cde37a0 .extend/s 32, L_0xb4d1f5720;
L_0xb4cde3840 .extend/s 32, L_0xb4d1f57c0;
L_0xb4cde38e0 .arith/mult 32, L_0xb4cde37a0, L_0xb4cde3840;
L_0xb4d1f55e0 .part L_0xb4cde38e0, 31, 1;
L_0xb4d1f5680 .repeat 8, 8, L_0xb4d1f55e0;
L_0xb4cde3980 .concat [ 32 8 0 0], L_0xb4cde38e0, L_0xb4d1f5680;
L_0xb4d18ed00 .arith/sum 40, L_0xb4c854328, L_0xb4cde3980;
S_0xb4d220c00 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cc2ff80 .param/l "i" 1 6 17, +C4<0110>;
S_0xb4d220d80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d220c00;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8c0c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8c100 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8c140 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4ccdee40_0 .net/s *"_ivl_0", 31 0, L_0xb4cde3a20;  1 drivers
v0xb4ccdeee0_0 .net/s *"_ivl_2", 31 0, L_0xb4cde3ac0;  1 drivers
v0xb4ccdef80_0 .net *"_ivl_7", 0 0, L_0xb4d1f5860;  1 drivers
v0xb4ccdf020_0 .net *"_ivl_9", 7 0, L_0xb4d1f5900;  1 drivers
L_0xb4c854370 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4ccdf0c0_0 .net/s "acc_in", 39 0, L_0xb4c854370;  1 drivers
v0xb4ccdf160_0 .net/s "acc_out", 39 0, L_0xb4d18eda0;  alias, 1 drivers
v0xb4ccdf200_0 .net/s "product", 31 0, L_0xb4cde3b60;  1 drivers
v0xb4ccdf2a0_0 .net/s "product_ext", 39 0, L_0xb4cde3c00;  1 drivers
v0xb4ccdf340_0 .net/s "w", 15 0, L_0xb4d1f5a40;  1 drivers
v0xb4ccdf3e0_0 .net/s "x", 15 0, L_0xb4d1f59a0;  1 drivers
L_0xb4cde3a20 .extend/s 32, L_0xb4d1f59a0;
L_0xb4cde3ac0 .extend/s 32, L_0xb4d1f5a40;
L_0xb4cde3b60 .arith/mult 32, L_0xb4cde3a20, L_0xb4cde3ac0;
L_0xb4d1f5860 .part L_0xb4cde3b60, 31, 1;
L_0xb4d1f5900 .repeat 8, 8, L_0xb4d1f5860;
L_0xb4cde3c00 .concat [ 32 8 0 0], L_0xb4cde3b60, L_0xb4d1f5900;
L_0xb4d18eda0 .arith/sum 40, L_0xb4c854370, L_0xb4cde3c00;
S_0xb4d220f00 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cc2ffc0 .param/l "i" 1 6 17, +C4<0111>;
S_0xb4d221080 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d220f00;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8c180 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8c1c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8c200 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4ccdf480_0 .net/s *"_ivl_0", 31 0, L_0xb4cde3ca0;  1 drivers
v0xb4ccdf520_0 .net/s *"_ivl_2", 31 0, L_0xb4cde3d40;  1 drivers
v0xb4ccdf5c0_0 .net *"_ivl_7", 0 0, L_0xb4d1f5ae0;  1 drivers
v0xb4ccdf660_0 .net *"_ivl_9", 7 0, L_0xb4d1f5b80;  1 drivers
L_0xb4c8543b8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4ccdf700_0 .net/s "acc_in", 39 0, L_0xb4c8543b8;  1 drivers
v0xb4ccdf7a0_0 .net/s "acc_out", 39 0, L_0xb4d18ee40;  alias, 1 drivers
v0xb4ccdf840_0 .net/s "product", 31 0, L_0xb4cde3de0;  1 drivers
v0xb4ccdf8e0_0 .net/s "product_ext", 39 0, L_0xb4cde3e80;  1 drivers
v0xb4ccdf980_0 .net/s "w", 15 0, L_0xb4d1f5cc0;  1 drivers
v0xb4ccdfa20_0 .net/s "x", 15 0, L_0xb4d1f5c20;  1 drivers
L_0xb4cde3ca0 .extend/s 32, L_0xb4d1f5c20;
L_0xb4cde3d40 .extend/s 32, L_0xb4d1f5cc0;
L_0xb4cde3de0 .arith/mult 32, L_0xb4cde3ca0, L_0xb4cde3d40;
L_0xb4d1f5ae0 .part L_0xb4cde3de0, 31, 1;
L_0xb4d1f5b80 .repeat 8, 8, L_0xb4d1f5ae0;
L_0xb4cde3e80 .concat [ 32 8 0 0], L_0xb4cde3de0, L_0xb4d1f5b80;
L_0xb4d18ee40 .arith/sum 40, L_0xb4c8543b8, L_0xb4cde3e80;
S_0xb4d221200 .scope generate, "GEN_MAC[8]" "GEN_MAC[8]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd90000 .param/l "i" 1 6 17, +C4<01000>;
S_0xb4d221380 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d221200;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8c240 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8c280 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8c2c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4ccdfac0_0 .net/s *"_ivl_0", 31 0, L_0xb4cde3f20;  1 drivers
v0xb4ccdfb60_0 .net/s *"_ivl_2", 31 0, L_0xb4cde4000;  1 drivers
v0xb4ccdfc00_0 .net *"_ivl_7", 0 0, L_0xb4d1f5d60;  1 drivers
v0xb4ccdfca0_0 .net *"_ivl_9", 7 0, L_0xb4d1f5e00;  1 drivers
L_0xb4c854400 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4ccdfd40_0 .net/s "acc_in", 39 0, L_0xb4c854400;  1 drivers
v0xb4ccdfde0_0 .net/s "acc_out", 39 0, L_0xb4d18eee0;  alias, 1 drivers
v0xb4ccdfe80_0 .net/s "product", 31 0, L_0xb4cde40a0;  1 drivers
v0xb4ccdff20_0 .net/s "product_ext", 39 0, L_0xb4cde4140;  1 drivers
v0xb4cd94000_0 .net/s "w", 15 0, L_0xb4d1f5fe0;  1 drivers
v0xb4cd940a0_0 .net/s "x", 15 0, L_0xb4d1f5ea0;  1 drivers
L_0xb4cde3f20 .extend/s 32, L_0xb4d1f5ea0;
L_0xb4cde4000 .extend/s 32, L_0xb4d1f5fe0;
L_0xb4cde40a0 .arith/mult 32, L_0xb4cde3f20, L_0xb4cde4000;
L_0xb4d1f5d60 .part L_0xb4cde40a0, 31, 1;
L_0xb4d1f5e00 .repeat 8, 8, L_0xb4d1f5d60;
L_0xb4cde4140 .concat [ 32 8 0 0], L_0xb4cde40a0, L_0xb4d1f5e00;
L_0xb4d18eee0 .arith/sum 40, L_0xb4c854400, L_0xb4cde4140;
S_0xb4d221500 .scope generate, "GEN_MAC[9]" "GEN_MAC[9]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd98000 .param/l "i" 1 6 17, +C4<01001>;
S_0xb4d221680 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d221500;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8c300 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8c340 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8c380 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cd94140_0 .net/s *"_ivl_0", 31 0, L_0xb4cde41e0;  1 drivers
v0xb4cd941e0_0 .net/s *"_ivl_2", 31 0, L_0xb4cde4280;  1 drivers
v0xb4cd94280_0 .net *"_ivl_7", 0 0, L_0xb4d1f6080;  1 drivers
v0xb4cd94320_0 .net *"_ivl_9", 7 0, L_0xb4d1f6120;  1 drivers
L_0xb4c854448 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cd943c0_0 .net/s "acc_in", 39 0, L_0xb4c854448;  1 drivers
v0xb4cd94460_0 .net/s "acc_out", 39 0, L_0xb4d18ef80;  alias, 1 drivers
v0xb4cd94500_0 .net/s "product", 31 0, L_0xb4cde4320;  1 drivers
v0xb4cd945a0_0 .net/s "product_ext", 39 0, L_0xb4cde43c0;  1 drivers
v0xb4cd94640_0 .net/s "w", 15 0, L_0xb4d1f6260;  1 drivers
v0xb4cd946e0_0 .net/s "x", 15 0, L_0xb4d1f61c0;  1 drivers
L_0xb4cde41e0 .extend/s 32, L_0xb4d1f61c0;
L_0xb4cde4280 .extend/s 32, L_0xb4d1f6260;
L_0xb4cde4320 .arith/mult 32, L_0xb4cde41e0, L_0xb4cde4280;
L_0xb4d1f6080 .part L_0xb4cde4320, 31, 1;
L_0xb4d1f6120 .repeat 8, 8, L_0xb4d1f6080;
L_0xb4cde43c0 .concat [ 32 8 0 0], L_0xb4cde4320, L_0xb4d1f6120;
L_0xb4d18ef80 .arith/sum 40, L_0xb4c854448, L_0xb4cde43c0;
S_0xb4d221800 .scope generate, "GEN_MAC[10]" "GEN_MAC[10]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd98040 .param/l "i" 1 6 17, +C4<01010>;
S_0xb4d221980 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d221800;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8c3c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8c400 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8c440 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cd94780_0 .net/s *"_ivl_0", 31 0, L_0xb4cde4460;  1 drivers
v0xb4cd94820_0 .net/s *"_ivl_2", 31 0, L_0xb4cde4500;  1 drivers
v0xb4cd948c0_0 .net *"_ivl_7", 0 0, L_0xb4d1f6300;  1 drivers
v0xb4cd94960_0 .net *"_ivl_9", 7 0, L_0xb4d1f63a0;  1 drivers
L_0xb4c854490 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cd94a00_0 .net/s "acc_in", 39 0, L_0xb4c854490;  1 drivers
v0xb4cd94aa0_0 .net/s "acc_out", 39 0, L_0xb4d18f020;  alias, 1 drivers
v0xb4cd94b40_0 .net/s "product", 31 0, L_0xb4cde45a0;  1 drivers
v0xb4cd94be0_0 .net/s "product_ext", 39 0, L_0xb4cde4640;  1 drivers
v0xb4cd94c80_0 .net/s "w", 15 0, L_0xb4d1f5f40;  1 drivers
v0xb4cd94d20_0 .net/s "x", 15 0, L_0xb4d1f6440;  1 drivers
L_0xb4cde4460 .extend/s 32, L_0xb4d1f6440;
L_0xb4cde4500 .extend/s 32, L_0xb4d1f5f40;
L_0xb4cde45a0 .arith/mult 32, L_0xb4cde4460, L_0xb4cde4500;
L_0xb4d1f6300 .part L_0xb4cde45a0, 31, 1;
L_0xb4d1f63a0 .repeat 8, 8, L_0xb4d1f6300;
L_0xb4cde4640 .concat [ 32 8 0 0], L_0xb4cde45a0, L_0xb4d1f63a0;
L_0xb4d18f020 .arith/sum 40, L_0xb4c854490, L_0xb4cde4640;
S_0xb4d221b00 .scope generate, "GEN_MAC[11]" "GEN_MAC[11]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd98080 .param/l "i" 1 6 17, +C4<01011>;
S_0xb4d221c80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d221b00;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8c480 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8c4c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8c500 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cd94dc0_0 .net/s *"_ivl_0", 31 0, L_0xb4cde46e0;  1 drivers
v0xb4cd94e60_0 .net/s *"_ivl_2", 31 0, L_0xb4cde4780;  1 drivers
v0xb4cd94f00_0 .net *"_ivl_7", 0 0, L_0xb4d1f64e0;  1 drivers
v0xb4cd94fa0_0 .net *"_ivl_9", 7 0, L_0xb4d1f6580;  1 drivers
L_0xb4c8544d8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cd95040_0 .net/s "acc_in", 39 0, L_0xb4c8544d8;  1 drivers
v0xb4cd950e0_0 .net/s "acc_out", 39 0, L_0xb4d18f0c0;  alias, 1 drivers
v0xb4cd95180_0 .net/s "product", 31 0, L_0xb4cde4820;  1 drivers
v0xb4cd95220_0 .net/s "product_ext", 39 0, L_0xb4cde48c0;  1 drivers
v0xb4cd952c0_0 .net/s "w", 15 0, L_0xb4d1f66c0;  1 drivers
v0xb4cd95360_0 .net/s "x", 15 0, L_0xb4d1f6620;  1 drivers
L_0xb4cde46e0 .extend/s 32, L_0xb4d1f6620;
L_0xb4cde4780 .extend/s 32, L_0xb4d1f66c0;
L_0xb4cde4820 .arith/mult 32, L_0xb4cde46e0, L_0xb4cde4780;
L_0xb4d1f64e0 .part L_0xb4cde4820, 31, 1;
L_0xb4d1f6580 .repeat 8, 8, L_0xb4d1f64e0;
L_0xb4cde48c0 .concat [ 32 8 0 0], L_0xb4cde4820, L_0xb4d1f6580;
L_0xb4d18f0c0 .arith/sum 40, L_0xb4c8544d8, L_0xb4cde48c0;
S_0xb4d221e00 .scope generate, "GEN_MAC[12]" "GEN_MAC[12]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd980c0 .param/l "i" 1 6 17, +C4<01100>;
S_0xb4d221f80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d221e00;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8c540 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8c580 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8c5c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cd95400_0 .net/s *"_ivl_0", 31 0, L_0xb4cde4960;  1 drivers
v0xb4cd954a0_0 .net/s *"_ivl_2", 31 0, L_0xb4cde4a00;  1 drivers
v0xb4cd95540_0 .net *"_ivl_7", 0 0, L_0xb4d1f6760;  1 drivers
v0xb4cd955e0_0 .net *"_ivl_9", 7 0, L_0xb4d1f6800;  1 drivers
L_0xb4c854520 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cd95680_0 .net/s "acc_in", 39 0, L_0xb4c854520;  1 drivers
v0xb4cd95720_0 .net/s "acc_out", 39 0, L_0xb4d18f160;  alias, 1 drivers
v0xb4cd957c0_0 .net/s "product", 31 0, L_0xb4cde4aa0;  1 drivers
v0xb4cd95860_0 .net/s "product_ext", 39 0, L_0xb4cde4b40;  1 drivers
v0xb4cd95900_0 .net/s "w", 15 0, L_0xb4d1f6940;  1 drivers
v0xb4cd959a0_0 .net/s "x", 15 0, L_0xb4d1f68a0;  1 drivers
L_0xb4cde4960 .extend/s 32, L_0xb4d1f68a0;
L_0xb4cde4a00 .extend/s 32, L_0xb4d1f6940;
L_0xb4cde4aa0 .arith/mult 32, L_0xb4cde4960, L_0xb4cde4a00;
L_0xb4d1f6760 .part L_0xb4cde4aa0, 31, 1;
L_0xb4d1f6800 .repeat 8, 8, L_0xb4d1f6760;
L_0xb4cde4b40 .concat [ 32 8 0 0], L_0xb4cde4aa0, L_0xb4d1f6800;
L_0xb4d18f160 .arith/sum 40, L_0xb4c854520, L_0xb4cde4b40;
S_0xb4d222100 .scope generate, "GEN_MAC[13]" "GEN_MAC[13]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd98100 .param/l "i" 1 6 17, +C4<01101>;
S_0xb4d222280 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d222100;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8c600 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8c640 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8c680 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cd95a40_0 .net/s *"_ivl_0", 31 0, L_0xb4cde4be0;  1 drivers
v0xb4cd95ae0_0 .net/s *"_ivl_2", 31 0, L_0xb4cde4c80;  1 drivers
v0xb4cd95b80_0 .net *"_ivl_7", 0 0, L_0xb4d1f69e0;  1 drivers
v0xb4cd95c20_0 .net *"_ivl_9", 7 0, L_0xb4d1f6a80;  1 drivers
L_0xb4c854568 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cd95cc0_0 .net/s "acc_in", 39 0, L_0xb4c854568;  1 drivers
v0xb4cd95d60_0 .net/s "acc_out", 39 0, L_0xb4d18f200;  alias, 1 drivers
v0xb4cd95e00_0 .net/s "product", 31 0, L_0xb4cde4d20;  1 drivers
v0xb4cd95ea0_0 .net/s "product_ext", 39 0, L_0xb4cde4dc0;  1 drivers
v0xb4cd95f40_0 .net/s "w", 15 0, L_0xb4d1f6bc0;  1 drivers
v0xb4cd95fe0_0 .net/s "x", 15 0, L_0xb4d1f6b20;  1 drivers
L_0xb4cde4be0 .extend/s 32, L_0xb4d1f6b20;
L_0xb4cde4c80 .extend/s 32, L_0xb4d1f6bc0;
L_0xb4cde4d20 .arith/mult 32, L_0xb4cde4be0, L_0xb4cde4c80;
L_0xb4d1f69e0 .part L_0xb4cde4d20, 31, 1;
L_0xb4d1f6a80 .repeat 8, 8, L_0xb4d1f69e0;
L_0xb4cde4dc0 .concat [ 32 8 0 0], L_0xb4cde4d20, L_0xb4d1f6a80;
L_0xb4d18f200 .arith/sum 40, L_0xb4c854568, L_0xb4cde4dc0;
S_0xb4d222400 .scope generate, "GEN_MAC[14]" "GEN_MAC[14]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd98140 .param/l "i" 1 6 17, +C4<01110>;
S_0xb4d222580 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d222400;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8c6c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8c700 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8c740 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cd96080_0 .net/s *"_ivl_0", 31 0, L_0xb4cde4e60;  1 drivers
v0xb4cd96120_0 .net/s *"_ivl_2", 31 0, L_0xb4cde4f00;  1 drivers
v0xb4cd961c0_0 .net *"_ivl_7", 0 0, L_0xb4d1f6c60;  1 drivers
v0xb4cd96260_0 .net *"_ivl_9", 7 0, L_0xb4d1f6d00;  1 drivers
L_0xb4c8545b0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cd96300_0 .net/s "acc_in", 39 0, L_0xb4c8545b0;  1 drivers
v0xb4cd963a0_0 .net/s "acc_out", 39 0, L_0xb4d18f2a0;  alias, 1 drivers
v0xb4cd96440_0 .net/s "product", 31 0, L_0xb4cde4fa0;  1 drivers
v0xb4cd964e0_0 .net/s "product_ext", 39 0, L_0xb4cde5040;  1 drivers
v0xb4cd96580_0 .net/s "w", 15 0, L_0xb4d1f6e40;  1 drivers
v0xb4cd96620_0 .net/s "x", 15 0, L_0xb4d1f6da0;  1 drivers
L_0xb4cde4e60 .extend/s 32, L_0xb4d1f6da0;
L_0xb4cde4f00 .extend/s 32, L_0xb4d1f6e40;
L_0xb4cde4fa0 .arith/mult 32, L_0xb4cde4e60, L_0xb4cde4f00;
L_0xb4d1f6c60 .part L_0xb4cde4fa0, 31, 1;
L_0xb4d1f6d00 .repeat 8, 8, L_0xb4d1f6c60;
L_0xb4cde5040 .concat [ 32 8 0 0], L_0xb4cde4fa0, L_0xb4d1f6d00;
L_0xb4d18f2a0 .arith/sum 40, L_0xb4c8545b0, L_0xb4cde5040;
S_0xb4d222700 .scope generate, "GEN_MAC[15]" "GEN_MAC[15]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd98180 .param/l "i" 1 6 17, +C4<01111>;
S_0xb4d222880 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d222700;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8c780 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8c7c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8c800 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cd966c0_0 .net/s *"_ivl_0", 31 0, L_0xb4cde50e0;  1 drivers
v0xb4cd96760_0 .net/s *"_ivl_2", 31 0, L_0xb4cde5180;  1 drivers
v0xb4cd96800_0 .net *"_ivl_7", 0 0, L_0xb4d1f6ee0;  1 drivers
v0xb4cd968a0_0 .net *"_ivl_9", 7 0, L_0xb4d1f6f80;  1 drivers
L_0xb4c8545f8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cd96940_0 .net/s "acc_in", 39 0, L_0xb4c8545f8;  1 drivers
v0xb4cd969e0_0 .net/s "acc_out", 39 0, L_0xb4d18f340;  alias, 1 drivers
v0xb4cd96a80_0 .net/s "product", 31 0, L_0xb4cde5220;  1 drivers
v0xb4cd96b20_0 .net/s "product_ext", 39 0, L_0xb4cde52c0;  1 drivers
v0xb4cd96bc0_0 .net/s "w", 15 0, L_0xb4d1f70c0;  1 drivers
v0xb4cd96c60_0 .net/s "x", 15 0, L_0xb4d1f7020;  1 drivers
L_0xb4cde50e0 .extend/s 32, L_0xb4d1f7020;
L_0xb4cde5180 .extend/s 32, L_0xb4d1f70c0;
L_0xb4cde5220 .arith/mult 32, L_0xb4cde50e0, L_0xb4cde5180;
L_0xb4d1f6ee0 .part L_0xb4cde5220, 31, 1;
L_0xb4d1f6f80 .repeat 8, 8, L_0xb4d1f6ee0;
L_0xb4cde52c0 .concat [ 32 8 0 0], L_0xb4cde5220, L_0xb4d1f6f80;
L_0xb4d18f340 .arith/sum 40, L_0xb4c8545f8, L_0xb4cde52c0;
S_0xb4d222a00 .scope generate, "GEN_MAC[16]" "GEN_MAC[16]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd981c0 .param/l "i" 1 6 17, +C4<010000>;
S_0xb4d222b80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d222a00;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8c840 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8c880 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8c8c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cd96d00_0 .net/s *"_ivl_0", 31 0, L_0xb4cde5360;  1 drivers
v0xb4cd96da0_0 .net/s *"_ivl_2", 31 0, L_0xb4cde5400;  1 drivers
v0xb4cd96e40_0 .net *"_ivl_7", 0 0, L_0xb4d1f7160;  1 drivers
v0xb4cd96ee0_0 .net *"_ivl_9", 7 0, L_0xb4d1f7200;  1 drivers
L_0xb4c854640 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cd96f80_0 .net/s "acc_in", 39 0, L_0xb4c854640;  1 drivers
v0xb4cd97020_0 .net/s "acc_out", 39 0, L_0xb4d18f3e0;  alias, 1 drivers
v0xb4cd970c0_0 .net/s "product", 31 0, L_0xb4cde54a0;  1 drivers
v0xb4cd97160_0 .net/s "product_ext", 39 0, L_0xb4cde5540;  1 drivers
v0xb4cd97200_0 .net/s "w", 15 0, L_0xb4d1f7340;  1 drivers
v0xb4cd972a0_0 .net/s "x", 15 0, L_0xb4d1f72a0;  1 drivers
L_0xb4cde5360 .extend/s 32, L_0xb4d1f72a0;
L_0xb4cde5400 .extend/s 32, L_0xb4d1f7340;
L_0xb4cde54a0 .arith/mult 32, L_0xb4cde5360, L_0xb4cde5400;
L_0xb4d1f7160 .part L_0xb4cde54a0, 31, 1;
L_0xb4d1f7200 .repeat 8, 8, L_0xb4d1f7160;
L_0xb4cde5540 .concat [ 32 8 0 0], L_0xb4cde54a0, L_0xb4d1f7200;
L_0xb4d18f3e0 .arith/sum 40, L_0xb4c854640, L_0xb4cde5540;
S_0xb4d222d00 .scope generate, "GEN_MAC[17]" "GEN_MAC[17]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd98200 .param/l "i" 1 6 17, +C4<010001>;
S_0xb4d222e80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d222d00;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8c900 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8c940 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8c980 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cd97340_0 .net/s *"_ivl_0", 31 0, L_0xb4cde55e0;  1 drivers
v0xb4cd973e0_0 .net/s *"_ivl_2", 31 0, L_0xb4cde5680;  1 drivers
v0xb4cd97480_0 .net *"_ivl_7", 0 0, L_0xb4d1f73e0;  1 drivers
v0xb4cd97520_0 .net *"_ivl_9", 7 0, L_0xb4d1f7480;  1 drivers
L_0xb4c854688 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cd975c0_0 .net/s "acc_in", 39 0, L_0xb4c854688;  1 drivers
v0xb4cd97660_0 .net/s "acc_out", 39 0, L_0xb4d18f480;  alias, 1 drivers
v0xb4cd97700_0 .net/s "product", 31 0, L_0xb4cde5720;  1 drivers
v0xb4cd977a0_0 .net/s "product_ext", 39 0, L_0xb4cde57c0;  1 drivers
v0xb4cd97840_0 .net/s "w", 15 0, L_0xb4d1f75c0;  1 drivers
v0xb4cd978e0_0 .net/s "x", 15 0, L_0xb4d1f7520;  1 drivers
L_0xb4cde55e0 .extend/s 32, L_0xb4d1f7520;
L_0xb4cde5680 .extend/s 32, L_0xb4d1f75c0;
L_0xb4cde5720 .arith/mult 32, L_0xb4cde55e0, L_0xb4cde5680;
L_0xb4d1f73e0 .part L_0xb4cde5720, 31, 1;
L_0xb4d1f7480 .repeat 8, 8, L_0xb4d1f73e0;
L_0xb4cde57c0 .concat [ 32 8 0 0], L_0xb4cde5720, L_0xb4d1f7480;
L_0xb4d18f480 .arith/sum 40, L_0xb4c854688, L_0xb4cde57c0;
S_0xb4d223000 .scope generate, "GEN_MAC[18]" "GEN_MAC[18]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd98240 .param/l "i" 1 6 17, +C4<010010>;
S_0xb4d223180 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d223000;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8c9c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8ca00 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8ca40 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cd97980_0 .net/s *"_ivl_0", 31 0, L_0xb4cde5860;  1 drivers
v0xb4cd97a20_0 .net/s *"_ivl_2", 31 0, L_0xb4cde5900;  1 drivers
v0xb4cd97ac0_0 .net *"_ivl_7", 0 0, L_0xb4d1f7660;  1 drivers
v0xb4cd97b60_0 .net *"_ivl_9", 7 0, L_0xb4d1f7700;  1 drivers
L_0xb4c8546d0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cd97c00_0 .net/s "acc_in", 39 0, L_0xb4c8546d0;  1 drivers
v0xb4cd97ca0_0 .net/s "acc_out", 39 0, L_0xb4d18f520;  alias, 1 drivers
v0xb4cd97d40_0 .net/s "product", 31 0, L_0xb4cde59a0;  1 drivers
v0xb4cd97de0_0 .net/s "product_ext", 39 0, L_0xb4cde5a40;  1 drivers
v0xb4cd97e80_0 .net/s "w", 15 0, L_0xb4d1f7840;  1 drivers
v0xb4cd97f20_0 .net/s "x", 15 0, L_0xb4d1f77a0;  1 drivers
L_0xb4cde5860 .extend/s 32, L_0xb4d1f77a0;
L_0xb4cde5900 .extend/s 32, L_0xb4d1f7840;
L_0xb4cde59a0 .arith/mult 32, L_0xb4cde5860, L_0xb4cde5900;
L_0xb4d1f7660 .part L_0xb4cde59a0, 31, 1;
L_0xb4d1f7700 .repeat 8, 8, L_0xb4d1f7660;
L_0xb4cde5a40 .concat [ 32 8 0 0], L_0xb4cde59a0, L_0xb4d1f7700;
L_0xb4d18f520 .arith/sum 40, L_0xb4c8546d0, L_0xb4cde5a40;
S_0xb4d223300 .scope generate, "GEN_MAC[19]" "GEN_MAC[19]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd98280 .param/l "i" 1 6 17, +C4<010011>;
S_0xb4d223480 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d223300;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8ca80 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8cac0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8cb00 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cd9c000_0 .net/s *"_ivl_0", 31 0, L_0xb4cde5ae0;  1 drivers
v0xb4cd9c0a0_0 .net/s *"_ivl_2", 31 0, L_0xb4cde5b80;  1 drivers
v0xb4cd9c140_0 .net *"_ivl_7", 0 0, L_0xb4d1f78e0;  1 drivers
v0xb4cd9c1e0_0 .net *"_ivl_9", 7 0, L_0xb4d1f7980;  1 drivers
L_0xb4c854718 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cd9c280_0 .net/s "acc_in", 39 0, L_0xb4c854718;  1 drivers
v0xb4cd9c320_0 .net/s "acc_out", 39 0, L_0xb4d18f5c0;  alias, 1 drivers
v0xb4cd9c3c0_0 .net/s "product", 31 0, L_0xb4cde5c20;  1 drivers
v0xb4cd9c460_0 .net/s "product_ext", 39 0, L_0xb4cde5cc0;  1 drivers
v0xb4cd9c500_0 .net/s "w", 15 0, L_0xb4d1f7ac0;  1 drivers
v0xb4cd9c5a0_0 .net/s "x", 15 0, L_0xb4d1f7a20;  1 drivers
L_0xb4cde5ae0 .extend/s 32, L_0xb4d1f7a20;
L_0xb4cde5b80 .extend/s 32, L_0xb4d1f7ac0;
L_0xb4cde5c20 .arith/mult 32, L_0xb4cde5ae0, L_0xb4cde5b80;
L_0xb4d1f78e0 .part L_0xb4cde5c20, 31, 1;
L_0xb4d1f7980 .repeat 8, 8, L_0xb4d1f78e0;
L_0xb4cde5cc0 .concat [ 32 8 0 0], L_0xb4cde5c20, L_0xb4d1f7980;
L_0xb4d18f5c0 .arith/sum 40, L_0xb4c854718, L_0xb4cde5cc0;
S_0xb4d223600 .scope generate, "GEN_MAC[20]" "GEN_MAC[20]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd982c0 .param/l "i" 1 6 17, +C4<010100>;
S_0xb4d223780 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d223600;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8cb40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8cb80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8cbc0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cd9c640_0 .net/s *"_ivl_0", 31 0, L_0xb4cde5d60;  1 drivers
v0xb4cd9c6e0_0 .net/s *"_ivl_2", 31 0, L_0xb4cde5e00;  1 drivers
v0xb4cd9c780_0 .net *"_ivl_7", 0 0, L_0xb4d1f7b60;  1 drivers
v0xb4cd9c820_0 .net *"_ivl_9", 7 0, L_0xb4d1f7c00;  1 drivers
L_0xb4c854760 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cd9c8c0_0 .net/s "acc_in", 39 0, L_0xb4c854760;  1 drivers
v0xb4cd9c960_0 .net/s "acc_out", 39 0, L_0xb4d18f660;  alias, 1 drivers
v0xb4cd9ca00_0 .net/s "product", 31 0, L_0xb4cde5ea0;  1 drivers
v0xb4cd9caa0_0 .net/s "product_ext", 39 0, L_0xb4cde5f40;  1 drivers
v0xb4cd9cb40_0 .net/s "w", 15 0, L_0xb4d1f7d40;  1 drivers
v0xb4cd9cbe0_0 .net/s "x", 15 0, L_0xb4d1f7ca0;  1 drivers
L_0xb4cde5d60 .extend/s 32, L_0xb4d1f7ca0;
L_0xb4cde5e00 .extend/s 32, L_0xb4d1f7d40;
L_0xb4cde5ea0 .arith/mult 32, L_0xb4cde5d60, L_0xb4cde5e00;
L_0xb4d1f7b60 .part L_0xb4cde5ea0, 31, 1;
L_0xb4d1f7c00 .repeat 8, 8, L_0xb4d1f7b60;
L_0xb4cde5f40 .concat [ 32 8 0 0], L_0xb4cde5ea0, L_0xb4d1f7c00;
L_0xb4d18f660 .arith/sum 40, L_0xb4c854760, L_0xb4cde5f40;
S_0xb4d223900 .scope generate, "GEN_MAC[21]" "GEN_MAC[21]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd98300 .param/l "i" 1 6 17, +C4<010101>;
S_0xb4d223a80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d223900;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8cc00 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8cc40 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8cc80 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cd9cc80_0 .net/s *"_ivl_0", 31 0, L_0xb4cde5fe0;  1 drivers
v0xb4cd9cd20_0 .net/s *"_ivl_2", 31 0, L_0xb4cde6080;  1 drivers
v0xb4cd9cdc0_0 .net *"_ivl_7", 0 0, L_0xb4d1f7de0;  1 drivers
v0xb4cd9ce60_0 .net *"_ivl_9", 7 0, L_0xb4d1f7e80;  1 drivers
L_0xb4c8547a8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cd9cf00_0 .net/s "acc_in", 39 0, L_0xb4c8547a8;  1 drivers
v0xb4cd9cfa0_0 .net/s "acc_out", 39 0, L_0xb4d18f700;  alias, 1 drivers
v0xb4cd9d040_0 .net/s "product", 31 0, L_0xb4cde6120;  1 drivers
v0xb4cd9d0e0_0 .net/s "product_ext", 39 0, L_0xb4cde61c0;  1 drivers
v0xb4cd9d180_0 .net/s "w", 15 0, L_0xb4d0e8000;  1 drivers
v0xb4cd9d220_0 .net/s "x", 15 0, L_0xb4d1f7f20;  1 drivers
L_0xb4cde5fe0 .extend/s 32, L_0xb4d1f7f20;
L_0xb4cde6080 .extend/s 32, L_0xb4d0e8000;
L_0xb4cde6120 .arith/mult 32, L_0xb4cde5fe0, L_0xb4cde6080;
L_0xb4d1f7de0 .part L_0xb4cde6120, 31, 1;
L_0xb4d1f7e80 .repeat 8, 8, L_0xb4d1f7de0;
L_0xb4cde61c0 .concat [ 32 8 0 0], L_0xb4cde6120, L_0xb4d1f7e80;
L_0xb4d18f700 .arith/sum 40, L_0xb4c8547a8, L_0xb4cde61c0;
S_0xb4d223c00 .scope generate, "GEN_MAC[22]" "GEN_MAC[22]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd98340 .param/l "i" 1 6 17, +C4<010110>;
S_0xb4d223d80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d223c00;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8ccc0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8cd00 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8cd40 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cd9d2c0_0 .net/s *"_ivl_0", 31 0, L_0xb4cde6260;  1 drivers
v0xb4cd9d360_0 .net/s *"_ivl_2", 31 0, L_0xb4cde6300;  1 drivers
v0xb4cd9d400_0 .net *"_ivl_7", 0 0, L_0xb4d0e80a0;  1 drivers
v0xb4cd9d4a0_0 .net *"_ivl_9", 7 0, L_0xb4d0e81e0;  1 drivers
L_0xb4c8547f0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cd9d540_0 .net/s "acc_in", 39 0, L_0xb4c8547f0;  1 drivers
v0xb4cd9d5e0_0 .net/s "acc_out", 39 0, L_0xb4d18f7a0;  alias, 1 drivers
v0xb4cd9d680_0 .net/s "product", 31 0, L_0xb4cde63a0;  1 drivers
v0xb4cd9d720_0 .net/s "product_ext", 39 0, L_0xb4cde6440;  1 drivers
v0xb4cd9d7c0_0 .net/s "w", 15 0, L_0xb4d174320;  1 drivers
v0xb4cd9d860_0 .net/s "x", 15 0, L_0xb4d1b8460;  1 drivers
L_0xb4cde6260 .extend/s 32, L_0xb4d1b8460;
L_0xb4cde6300 .extend/s 32, L_0xb4d174320;
L_0xb4cde63a0 .arith/mult 32, L_0xb4cde6260, L_0xb4cde6300;
L_0xb4d0e80a0 .part L_0xb4cde63a0, 31, 1;
L_0xb4d0e81e0 .repeat 8, 8, L_0xb4d0e80a0;
L_0xb4cde6440 .concat [ 32 8 0 0], L_0xb4cde63a0, L_0xb4d0e81e0;
L_0xb4d18f7a0 .arith/sum 40, L_0xb4c8547f0, L_0xb4cde6440;
S_0xb4d224000 .scope generate, "GEN_MAC[23]" "GEN_MAC[23]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd98380 .param/l "i" 1 6 17, +C4<010111>;
S_0xb4d224180 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d224000;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8cd80 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8cdc0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8ce00 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cd9d900_0 .net/s *"_ivl_0", 31 0, L_0xb4cde64e0;  1 drivers
v0xb4cd9d9a0_0 .net/s *"_ivl_2", 31 0, L_0xb4cde6580;  1 drivers
v0xb4cd9da40_0 .net *"_ivl_7", 0 0, L_0xb4d24c000;  1 drivers
v0xb4cd9dae0_0 .net *"_ivl_9", 7 0, L_0xb4d24c0a0;  1 drivers
L_0xb4c854838 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cd9db80_0 .net/s "acc_in", 39 0, L_0xb4c854838;  1 drivers
v0xb4cd9dc20_0 .net/s "acc_out", 39 0, L_0xb4d18f840;  alias, 1 drivers
v0xb4cd9dcc0_0 .net/s "product", 31 0, L_0xb4cde6620;  1 drivers
v0xb4cd9dd60_0 .net/s "product_ext", 39 0, L_0xb4cde66c0;  1 drivers
v0xb4cd9de00_0 .net/s "w", 15 0, L_0xb4d24c1e0;  1 drivers
v0xb4cd9dea0_0 .net/s "x", 15 0, L_0xb4d24c140;  1 drivers
L_0xb4cde64e0 .extend/s 32, L_0xb4d24c140;
L_0xb4cde6580 .extend/s 32, L_0xb4d24c1e0;
L_0xb4cde6620 .arith/mult 32, L_0xb4cde64e0, L_0xb4cde6580;
L_0xb4d24c000 .part L_0xb4cde6620, 31, 1;
L_0xb4d24c0a0 .repeat 8, 8, L_0xb4d24c000;
L_0xb4cde66c0 .concat [ 32 8 0 0], L_0xb4cde6620, L_0xb4d24c0a0;
L_0xb4d18f840 .arith/sum 40, L_0xb4c854838, L_0xb4cde66c0;
S_0xb4d224300 .scope generate, "GEN_MAC[24]" "GEN_MAC[24]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd983c0 .param/l "i" 1 6 17, +C4<011000>;
S_0xb4d224480 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d224300;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8ce40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8ce80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8cec0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cd9df40_0 .net/s *"_ivl_0", 31 0, L_0xb4cde6760;  1 drivers
v0xb4cd9dfe0_0 .net/s *"_ivl_2", 31 0, L_0xb4cde6800;  1 drivers
v0xb4cd9e080_0 .net *"_ivl_7", 0 0, L_0xb4d24c280;  1 drivers
v0xb4cd9e120_0 .net *"_ivl_9", 7 0, L_0xb4d24c320;  1 drivers
L_0xb4c854880 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cd9e1c0_0 .net/s "acc_in", 39 0, L_0xb4c854880;  1 drivers
v0xb4cd9e260_0 .net/s "acc_out", 39 0, L_0xb4d18f8e0;  alias, 1 drivers
v0xb4cd9e300_0 .net/s "product", 31 0, L_0xb4cde68a0;  1 drivers
v0xb4cd9e3a0_0 .net/s "product_ext", 39 0, L_0xb4cde6940;  1 drivers
v0xb4cd9e440_0 .net/s "w", 15 0, L_0xb4d24c460;  1 drivers
v0xb4cd9e4e0_0 .net/s "x", 15 0, L_0xb4d24c3c0;  1 drivers
L_0xb4cde6760 .extend/s 32, L_0xb4d24c3c0;
L_0xb4cde6800 .extend/s 32, L_0xb4d24c460;
L_0xb4cde68a0 .arith/mult 32, L_0xb4cde6760, L_0xb4cde6800;
L_0xb4d24c280 .part L_0xb4cde68a0, 31, 1;
L_0xb4d24c320 .repeat 8, 8, L_0xb4d24c280;
L_0xb4cde6940 .concat [ 32 8 0 0], L_0xb4cde68a0, L_0xb4d24c320;
L_0xb4d18f8e0 .arith/sum 40, L_0xb4c854880, L_0xb4cde6940;
S_0xb4d224600 .scope generate, "GEN_MAC[25]" "GEN_MAC[25]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd98400 .param/l "i" 1 6 17, +C4<011001>;
S_0xb4d224780 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d224600;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8cf00 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8cf40 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8cf80 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cd9e580_0 .net/s *"_ivl_0", 31 0, L_0xb4cde69e0;  1 drivers
v0xb4cd9e620_0 .net/s *"_ivl_2", 31 0, L_0xb4cde6a80;  1 drivers
v0xb4cd9e6c0_0 .net *"_ivl_7", 0 0, L_0xb4d24c500;  1 drivers
v0xb4cd9e760_0 .net *"_ivl_9", 7 0, L_0xb4d24c5a0;  1 drivers
L_0xb4c8548c8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cd9e800_0 .net/s "acc_in", 39 0, L_0xb4c8548c8;  1 drivers
v0xb4cd9e8a0_0 .net/s "acc_out", 39 0, L_0xb4d18f980;  alias, 1 drivers
v0xb4cd9e940_0 .net/s "product", 31 0, L_0xb4cde6b20;  1 drivers
v0xb4cd9e9e0_0 .net/s "product_ext", 39 0, L_0xb4cde6bc0;  1 drivers
v0xb4cd9ea80_0 .net/s "w", 15 0, L_0xb4d24c6e0;  1 drivers
v0xb4cd9eb20_0 .net/s "x", 15 0, L_0xb4d24c640;  1 drivers
L_0xb4cde69e0 .extend/s 32, L_0xb4d24c640;
L_0xb4cde6a80 .extend/s 32, L_0xb4d24c6e0;
L_0xb4cde6b20 .arith/mult 32, L_0xb4cde69e0, L_0xb4cde6a80;
L_0xb4d24c500 .part L_0xb4cde6b20, 31, 1;
L_0xb4d24c5a0 .repeat 8, 8, L_0xb4d24c500;
L_0xb4cde6bc0 .concat [ 32 8 0 0], L_0xb4cde6b20, L_0xb4d24c5a0;
L_0xb4d18f980 .arith/sum 40, L_0xb4c8548c8, L_0xb4cde6bc0;
S_0xb4d224900 .scope generate, "GEN_MAC[26]" "GEN_MAC[26]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd98440 .param/l "i" 1 6 17, +C4<011010>;
S_0xb4d224a80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d224900;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8cfc0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8d000 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8d040 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cd9ebc0_0 .net/s *"_ivl_0", 31 0, L_0xb4cde6c60;  1 drivers
v0xb4cd9ec60_0 .net/s *"_ivl_2", 31 0, L_0xb4cde6d00;  1 drivers
v0xb4cd9ed00_0 .net *"_ivl_7", 0 0, L_0xb4d24c780;  1 drivers
v0xb4cd9eda0_0 .net *"_ivl_9", 7 0, L_0xb4d24c820;  1 drivers
L_0xb4c854910 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cd9ee40_0 .net/s "acc_in", 39 0, L_0xb4c854910;  1 drivers
v0xb4cd9eee0_0 .net/s "acc_out", 39 0, L_0xb4d18fa20;  alias, 1 drivers
v0xb4cd9ef80_0 .net/s "product", 31 0, L_0xb4cde6da0;  1 drivers
v0xb4cd9f020_0 .net/s "product_ext", 39 0, L_0xb4cde6e40;  1 drivers
v0xb4cd9f0c0_0 .net/s "w", 15 0, L_0xb4d24c960;  1 drivers
v0xb4cd9f160_0 .net/s "x", 15 0, L_0xb4d24c8c0;  1 drivers
L_0xb4cde6c60 .extend/s 32, L_0xb4d24c8c0;
L_0xb4cde6d00 .extend/s 32, L_0xb4d24c960;
L_0xb4cde6da0 .arith/mult 32, L_0xb4cde6c60, L_0xb4cde6d00;
L_0xb4d24c780 .part L_0xb4cde6da0, 31, 1;
L_0xb4d24c820 .repeat 8, 8, L_0xb4d24c780;
L_0xb4cde6e40 .concat [ 32 8 0 0], L_0xb4cde6da0, L_0xb4d24c820;
L_0xb4d18fa20 .arith/sum 40, L_0xb4c854910, L_0xb4cde6e40;
S_0xb4d224c00 .scope generate, "GEN_MAC[27]" "GEN_MAC[27]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd98480 .param/l "i" 1 6 17, +C4<011011>;
S_0xb4d224d80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d224c00;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8d080 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8d0c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8d100 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cd9f200_0 .net/s *"_ivl_0", 31 0, L_0xb4cde6ee0;  1 drivers
v0xb4cd9f2a0_0 .net/s *"_ivl_2", 31 0, L_0xb4cde6f80;  1 drivers
v0xb4cd9f340_0 .net *"_ivl_7", 0 0, L_0xb4d24ca00;  1 drivers
v0xb4cd9f3e0_0 .net *"_ivl_9", 7 0, L_0xb4d24caa0;  1 drivers
L_0xb4c854958 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cd9f480_0 .net/s "acc_in", 39 0, L_0xb4c854958;  1 drivers
v0xb4cd9f520_0 .net/s "acc_out", 39 0, L_0xb4d18fac0;  alias, 1 drivers
v0xb4cd9f5c0_0 .net/s "product", 31 0, L_0xb4cde7020;  1 drivers
v0xb4cd9f660_0 .net/s "product_ext", 39 0, L_0xb4cde70c0;  1 drivers
v0xb4cd9f700_0 .net/s "w", 15 0, L_0xb4d24cbe0;  1 drivers
v0xb4cd9f7a0_0 .net/s "x", 15 0, L_0xb4d24cb40;  1 drivers
L_0xb4cde6ee0 .extend/s 32, L_0xb4d24cb40;
L_0xb4cde6f80 .extend/s 32, L_0xb4d24cbe0;
L_0xb4cde7020 .arith/mult 32, L_0xb4cde6ee0, L_0xb4cde6f80;
L_0xb4d24ca00 .part L_0xb4cde7020, 31, 1;
L_0xb4d24caa0 .repeat 8, 8, L_0xb4d24ca00;
L_0xb4cde70c0 .concat [ 32 8 0 0], L_0xb4cde7020, L_0xb4d24caa0;
L_0xb4d18fac0 .arith/sum 40, L_0xb4c854958, L_0xb4cde70c0;
S_0xb4d224f00 .scope generate, "GEN_MAC[28]" "GEN_MAC[28]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd984c0 .param/l "i" 1 6 17, +C4<011100>;
S_0xb4d225080 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d224f00;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8d140 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8d180 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8d1c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cd9f840_0 .net/s *"_ivl_0", 31 0, L_0xb4cde7160;  1 drivers
v0xb4cd9f8e0_0 .net/s *"_ivl_2", 31 0, L_0xb4cde7200;  1 drivers
v0xb4cd9f980_0 .net *"_ivl_7", 0 0, L_0xb4d24cc80;  1 drivers
v0xb4cd9fa20_0 .net *"_ivl_9", 7 0, L_0xb4d24cd20;  1 drivers
L_0xb4c8549a0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cd9fac0_0 .net/s "acc_in", 39 0, L_0xb4c8549a0;  1 drivers
v0xb4cd9fb60_0 .net/s "acc_out", 39 0, L_0xb4d18fb60;  alias, 1 drivers
v0xb4cd9fc00_0 .net/s "product", 31 0, L_0xb4cde72a0;  1 drivers
v0xb4cd9fca0_0 .net/s "product_ext", 39 0, L_0xb4cde7340;  1 drivers
v0xb4cd9fd40_0 .net/s "w", 15 0, L_0xb4d24ce60;  1 drivers
v0xb4cd9fde0_0 .net/s "x", 15 0, L_0xb4d24cdc0;  1 drivers
L_0xb4cde7160 .extend/s 32, L_0xb4d24cdc0;
L_0xb4cde7200 .extend/s 32, L_0xb4d24ce60;
L_0xb4cde72a0 .arith/mult 32, L_0xb4cde7160, L_0xb4cde7200;
L_0xb4d24cc80 .part L_0xb4cde72a0, 31, 1;
L_0xb4d24cd20 .repeat 8, 8, L_0xb4d24cc80;
L_0xb4cde7340 .concat [ 32 8 0 0], L_0xb4cde72a0, L_0xb4d24cd20;
L_0xb4d18fb60 .arith/sum 40, L_0xb4c8549a0, L_0xb4cde7340;
S_0xb4d225200 .scope generate, "GEN_MAC[29]" "GEN_MAC[29]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd98500 .param/l "i" 1 6 17, +C4<011101>;
S_0xb4d225380 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d225200;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8d200 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8d240 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8d280 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cd9fe80_0 .net/s *"_ivl_0", 31 0, L_0xb4cde73e0;  1 drivers
v0xb4cd9ff20_0 .net/s *"_ivl_2", 31 0, L_0xb4cde7480;  1 drivers
v0xb4cda0000_0 .net *"_ivl_7", 0 0, L_0xb4d24cf00;  1 drivers
v0xb4cda00a0_0 .net *"_ivl_9", 7 0, L_0xb4d24cfa0;  1 drivers
L_0xb4c8549e8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda0140_0 .net/s "acc_in", 39 0, L_0xb4c8549e8;  1 drivers
v0xb4cda01e0_0 .net/s "acc_out", 39 0, L_0xb4d18fc00;  alias, 1 drivers
v0xb4cda0280_0 .net/s "product", 31 0, L_0xb4cde7520;  1 drivers
v0xb4cda0320_0 .net/s "product_ext", 39 0, L_0xb4cde75c0;  1 drivers
v0xb4cda03c0_0 .net/s "w", 15 0, L_0xb4d24d0e0;  1 drivers
v0xb4cda0460_0 .net/s "x", 15 0, L_0xb4d24d040;  1 drivers
L_0xb4cde73e0 .extend/s 32, L_0xb4d24d040;
L_0xb4cde7480 .extend/s 32, L_0xb4d24d0e0;
L_0xb4cde7520 .arith/mult 32, L_0xb4cde73e0, L_0xb4cde7480;
L_0xb4d24cf00 .part L_0xb4cde7520, 31, 1;
L_0xb4d24cfa0 .repeat 8, 8, L_0xb4d24cf00;
L_0xb4cde75c0 .concat [ 32 8 0 0], L_0xb4cde7520, L_0xb4d24cfa0;
L_0xb4d18fc00 .arith/sum 40, L_0xb4c8549e8, L_0xb4cde75c0;
S_0xb4d225500 .scope generate, "GEN_MAC[30]" "GEN_MAC[30]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd98540 .param/l "i" 1 6 17, +C4<011110>;
S_0xb4d225680 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d225500;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8d2c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8d300 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8d340 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cda0500_0 .net/s *"_ivl_0", 31 0, L_0xb4cde7660;  1 drivers
v0xb4cda05a0_0 .net/s *"_ivl_2", 31 0, L_0xb4cde7700;  1 drivers
v0xb4cda0640_0 .net *"_ivl_7", 0 0, L_0xb4d24d180;  1 drivers
v0xb4cda06e0_0 .net *"_ivl_9", 7 0, L_0xb4d24d220;  1 drivers
L_0xb4c854a30 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda0780_0 .net/s "acc_in", 39 0, L_0xb4c854a30;  1 drivers
v0xb4cda0820_0 .net/s "acc_out", 39 0, L_0xb4d18fca0;  alias, 1 drivers
v0xb4cda08c0_0 .net/s "product", 31 0, L_0xb4cde77a0;  1 drivers
v0xb4cda0960_0 .net/s "product_ext", 39 0, L_0xb4cde7840;  1 drivers
v0xb4cda0a00_0 .net/s "w", 15 0, L_0xb4d24d360;  1 drivers
v0xb4cda0aa0_0 .net/s "x", 15 0, L_0xb4d24d2c0;  1 drivers
L_0xb4cde7660 .extend/s 32, L_0xb4d24d2c0;
L_0xb4cde7700 .extend/s 32, L_0xb4d24d360;
L_0xb4cde77a0 .arith/mult 32, L_0xb4cde7660, L_0xb4cde7700;
L_0xb4d24d180 .part L_0xb4cde77a0, 31, 1;
L_0xb4d24d220 .repeat 8, 8, L_0xb4d24d180;
L_0xb4cde7840 .concat [ 32 8 0 0], L_0xb4cde77a0, L_0xb4d24d220;
L_0xb4d18fca0 .arith/sum 40, L_0xb4c854a30, L_0xb4cde7840;
S_0xb4d225800 .scope generate, "GEN_MAC[31]" "GEN_MAC[31]" 6 17, 6 17 0, S_0x1029dc4e0;
 .timescale 0 0;
P_0xb4cd98580 .param/l "i" 1 6 17, +C4<011111>;
S_0xb4d225980 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d225800;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8d380 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8d3c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8d400 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cda0b40_0 .net/s *"_ivl_0", 31 0, L_0xb4cde78e0;  1 drivers
v0xb4cda0be0_0 .net/s *"_ivl_2", 31 0, L_0xb4cde7980;  1 drivers
v0xb4cda0c80_0 .net *"_ivl_7", 0 0, L_0xb4d24d400;  1 drivers
v0xb4cda0d20_0 .net *"_ivl_9", 7 0, L_0xb4d24d4a0;  1 drivers
L_0xb4c854a78 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda0dc0_0 .net/s "acc_in", 39 0, L_0xb4c854a78;  1 drivers
v0xb4cda0e60_0 .net/s "acc_out", 39 0, L_0xb4d18fd40;  alias, 1 drivers
v0xb4cda0f00_0 .net/s "product", 31 0, L_0xb4cde7a20;  1 drivers
v0xb4cda0fa0_0 .net/s "product_ext", 39 0, L_0xb4cde7ac0;  1 drivers
v0xb4cda1040_0 .net/s "w", 15 0, L_0xb4d24d5e0;  1 drivers
v0xb4cda10e0_0 .net/s "x", 15 0, L_0xb4d24d540;  1 drivers
L_0xb4cde78e0 .extend/s 32, L_0xb4d24d540;
L_0xb4cde7980 .extend/s 32, L_0xb4d24d5e0;
L_0xb4cde7a20 .arith/mult 32, L_0xb4cde78e0, L_0xb4cde7980;
L_0xb4d24d400 .part L_0xb4cde7a20, 31, 1;
L_0xb4d24d4a0 .repeat 8, 8, L_0xb4d24d400;
L_0xb4cde7ac0 .concat [ 32 8 0 0], L_0xb4cde7a20, L_0xb4d24d4a0;
L_0xb4d18fd40 .arith/sum 40, L_0xb4c854a78, L_0xb4cde7ac0;
S_0xb4d225b00 .scope generate, "GEN_NEURON[1]" "GEN_NEURON[1]" 4 35, 4 35 0, S_0x1029f0550;
 .timescale 0 0;
P_0xb4cd985c0 .param/l "n" 1 4 35, +C4<01>;
S_0xb4d225c80 .scope module, "u_neuron" "neuron_parallel" 4 43, 5 1 0, S_0xb4d225b00;
 .timescale 0 0;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst";
    .port_info 2 /INPUT 1 "start";
    .port_info 3 /INPUT 512 "x_bus";
    .port_info 4 /INPUT 512 "w_bus";
    .port_info 5 /INPUT 16 "bias";
    .port_info 6 /OUTPUT 16 "y";
    .port_info 7 /OUTPUT 1 "busy";
    .port_info 8 /OUTPUT 1 "done";
P_0x1029e6570 .param/l "ACC_WIDTH" 0 5 6, +C4<00000000000000000000000000101000>;
P_0x1029e65b0 .param/l "DATA_WIDTH" 0 5 2, +C4<00000000000000000000000000010000>;
P_0x1029e65f0 .param/l "FRAC_BITS" 0 5 3, +C4<00000000000000000000000000001000>;
P_0x1029e6630 .param/l "GROUPS" 1 5 21, +C4<00000000000000000000000000000001>;
P_0x1029e6670 .param/l "GROUP_INDEX_WIDTH" 1 5 22, +C4<00000000000000000000000000000001>;
P_0x1029e66b0 .param/l "N_INPUTS" 0 5 4, +C4<00000000000000000000000000100000>;
P_0x1029e66f0 .param/l "PARALLEL" 0 5 5, +C4<00000000000000000000000000100000>;
L_0x1029efd30 .functor BUFZ 16, L_0xb4d256ee0, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v0xb4cdb3980_0 .net *"_ivl_0", 31 0, L_0xb4cde7d40;  1 drivers
v0xb4cdb3a20_0 .net *"_ivl_11", 31 0, L_0xb4cde7e80;  1 drivers
v0xb4cdb3ac0_0 .net *"_ivl_14", 31 0, L_0xb4cde7f20;  1 drivers
L_0xb4c854be0 .functor BUFT 1, C4<0000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb3b60_0 .net *"_ivl_17", 30 0, L_0xb4c854be0;  1 drivers
L_0xb4c854c28 .functor BUFT 1, C4<00000000000000000000000000100000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb3c00_0 .net/2u *"_ivl_18", 31 0, L_0xb4c854c28;  1 drivers
v0xb4cdb3ca0_0 .net *"_ivl_21", 31 0, L_0xb4cdec000;  1 drivers
L_0xb4c854c70 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb3d40_0 .net/2u *"_ivl_22", 31 0, L_0xb4c854c70;  1 drivers
v0xb4cdb3de0_0 .net *"_ivl_25", 31 0, L_0xb4cdec0a0;  1 drivers
L_0xb4c854b08 .functor BUFT 1, C4<0000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb3e80_0 .net *"_ivl_3", 30 0, L_0xb4c854b08;  1 drivers
v0xb4cdb3f20_0 .net *"_ivl_31", 0 0, L_0xb4d256bc0;  1 drivers
v0xb4cdb4000_0 .net *"_ivl_33", 23 0, L_0xb4d256c60;  1 drivers
v0xb4cdb40a0_0 .net *"_ivl_36", 39 0, L_0xb4cdf5220;  1 drivers
v0xb4cdb4140_0 .net *"_ivl_38", 31 0, L_0xb4d256d00;  1 drivers
L_0xb4c854b50 .functor BUFT 1, C4<00000000000000000000000000100000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb41e0_0 .net/2u *"_ivl_4", 31 0, L_0xb4c854b50;  1 drivers
L_0xb4c8555b8 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb4280_0 .net *"_ivl_40", 7 0, L_0xb4c8555b8;  1 drivers
v0xb4cdb4320_0 .net *"_ivl_46", 31 0, L_0xb4d256da0;  1 drivers
v0xb4cdb43c0_0 .net *"_ivl_7", 31 0, L_0xb4cde7de0;  1 drivers
L_0xb4c854b98 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb4460_0 .net/2u *"_ivl_8", 31 0, L_0xb4c854b98;  1 drivers
v0xb4cdb4500_0 .var/s "acc", 39 0;
v0xb4cdb45a0_0 .net/s "acc_next", 39 0, L_0xb4d2512c0;  1 drivers
v0xb4cdb4640_0 .net/s "bias", 15 0, L_0xb4d256ee0;  1 drivers
v0xb4cdb46e0_0 .net/s "bias_ext", 39 0, L_0xb4cdf5180;  1 drivers
v0xb4cdb4780_0 .net/s "bias_ext_small", 15 0, L_0x1029efd30;  1 drivers
v0xb4cdb4820_0 .var "busy", 0 0;
v0xb4cdb48c0_0 .net "clk", 0 0, v0xb4cde2120_0;  alias, 1 drivers
v0xb4cdb4960_0 .var "done", 0 0;
v0xb4cdb4a00_0 .net/s "final_acc", 39 0, L_0xb4d251360;  1 drivers
v0xb4cdb4aa0_0 .net/s "final_value", 39 0, L_0xb4cdf52c0;  1 drivers
v0xb4cdb4b40_0 .var "group_index", 0 0;
v0xb4cdb4be0_0 .net "rst", 0 0, v0xb4cde2440_0;  alias, 1 drivers
v0xb4cdb4c80_0 .net "start", 0 0, v0xb4cde24e0_0;  alias, 1 drivers
v0xb4cdb4d20_0 .net/s "w_bus", 511 0, L_0xb4d256e40;  1 drivers
v0xb4cdb4dc0_0 .net/s "w_group", 511 0, L_0xb4d24dae0;  1 drivers
v0xb4cdb4e60_0 .net/s "x_bus", 511 0, v0xb4cde2620_0;  alias, 1 drivers
v0xb4cdb4f00_0 .net/s "x_group", 511 0, L_0xb4d24da40;  1 drivers
v0xb4cdb4fa0_0 .var/s "y", 15 0;
L_0xb4cde7d40 .concat [ 1 31 0 0], v0xb4cdb4b40_0, L_0xb4c854b08;
L_0xb4cde7de0 .arith/mult 32, L_0xb4cde7d40, L_0xb4c854b50;
L_0xb4cde7e80 .arith/mult 32, L_0xb4cde7de0, L_0xb4c854b98;
L_0xb4d24da40 .part/v v0xb4cde2620_0, L_0xb4cde7e80, 512;
L_0xb4cde7f20 .concat [ 1 31 0 0], v0xb4cdb4b40_0, L_0xb4c854be0;
L_0xb4cdec000 .arith/mult 32, L_0xb4cde7f20, L_0xb4c854c28;
L_0xb4cdec0a0 .arith/mult 32, L_0xb4cdec000, L_0xb4c854c70;
L_0xb4d24dae0 .part/v L_0xb4d256e40, L_0xb4cdec0a0, 512;
L_0xb4d256bc0 .part L_0x1029efd30, 15, 1;
L_0xb4d256c60 .repeat 24, 24, L_0xb4d256bc0;
L_0xb4cdf5180 .concat [ 16 24 0 0], L_0x1029efd30, L_0xb4d256c60;
L_0xb4d256d00 .part L_0xb4cdf5180, 0, 32;
L_0xb4cdf5220 .concat [ 8 32 0 0], L_0xb4c8555b8, L_0xb4d256d00;
L_0xb4d251360 .arith/sum 40, L_0xb4d2512c0, L_0xb4cdf5220;
L_0xb4d256da0 .part L_0xb4d251360, 8, 32;
L_0xb4cdf52c0 .extend/s 40, L_0xb4d256da0;
S_0xb4d225e00 .scope module, "u_mac8" "mac8" 5 52, 6 1 0, S_0xb4d225c80;
 .timescale 0 0;
    .port_info 0 /INPUT 512 "x_bus";
    .port_info 1 /INPUT 512 "w_bus";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8d440 .param/l "ACC_WIDTH" 0 6 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8d480 .param/l "DATA_WIDTH" 0 6 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8d4c0 .param/l "PARALLEL" 0 6 4, +C4<00000000000000000000000000100000>;
v0xb4cdb3520_0 .net/s "acc_in", 39 0, v0xb4cdb4500_0;  1 drivers
v0xb4cdb35c0_0 .net/s "acc_out", 39 0, L_0xb4d2512c0;  alias, 1 drivers
v0xb4cdb3660_0 .var/i "j", 31 0;
v0xb4cdb3700 .array "products", 31 0;
v0xb4cdb3700_0 .net/s v0xb4cdb3700 0, 39 0, L_0xb4d18ff20; 1 drivers
v0xb4cdb3700_1 .net/s v0xb4cdb3700 1, 39 0, L_0xb4d0bfa20; 1 drivers
v0xb4cdb3700_2 .net/s v0xb4cdb3700 2, 39 0, L_0xb4d250000; 1 drivers
v0xb4cdb3700_3 .net/s v0xb4cdb3700 3, 39 0, L_0xb4d2500a0; 1 drivers
v0xb4cdb3700_4 .net/s v0xb4cdb3700 4, 39 0, L_0xb4d250140; 1 drivers
v0xb4cdb3700_5 .net/s v0xb4cdb3700 5, 39 0, L_0xb4d2501e0; 1 drivers
v0xb4cdb3700_6 .net/s v0xb4cdb3700 6, 39 0, L_0xb4d250280; 1 drivers
v0xb4cdb3700_7 .net/s v0xb4cdb3700 7, 39 0, L_0xb4d250320; 1 drivers
v0xb4cdb3700_8 .net/s v0xb4cdb3700 8, 39 0, L_0xb4d2503c0; 1 drivers
v0xb4cdb3700_9 .net/s v0xb4cdb3700 9, 39 0, L_0xb4d250460; 1 drivers
v0xb4cdb3700_10 .net/s v0xb4cdb3700 10, 39 0, L_0xb4d250500; 1 drivers
v0xb4cdb3700_11 .net/s v0xb4cdb3700 11, 39 0, L_0xb4d2505a0; 1 drivers
v0xb4cdb3700_12 .net/s v0xb4cdb3700 12, 39 0, L_0xb4d250640; 1 drivers
v0xb4cdb3700_13 .net/s v0xb4cdb3700 13, 39 0, L_0xb4d2506e0; 1 drivers
v0xb4cdb3700_14 .net/s v0xb4cdb3700 14, 39 0, L_0xb4d250780; 1 drivers
v0xb4cdb3700_15 .net/s v0xb4cdb3700 15, 39 0, L_0xb4d250820; 1 drivers
v0xb4cdb3700_16 .net/s v0xb4cdb3700 16, 39 0, L_0xb4d2508c0; 1 drivers
v0xb4cdb3700_17 .net/s v0xb4cdb3700 17, 39 0, L_0xb4d250960; 1 drivers
v0xb4cdb3700_18 .net/s v0xb4cdb3700 18, 39 0, L_0xb4d250a00; 1 drivers
v0xb4cdb3700_19 .net/s v0xb4cdb3700 19, 39 0, L_0xb4d250aa0; 1 drivers
v0xb4cdb3700_20 .net/s v0xb4cdb3700 20, 39 0, L_0xb4d250b40; 1 drivers
v0xb4cdb3700_21 .net/s v0xb4cdb3700 21, 39 0, L_0xb4d250be0; 1 drivers
v0xb4cdb3700_22 .net/s v0xb4cdb3700 22, 39 0, L_0xb4d250c80; 1 drivers
v0xb4cdb3700_23 .net/s v0xb4cdb3700 23, 39 0, L_0xb4d250d20; 1 drivers
v0xb4cdb3700_24 .net/s v0xb4cdb3700 24, 39 0, L_0xb4d250dc0; 1 drivers
v0xb4cdb3700_25 .net/s v0xb4cdb3700 25, 39 0, L_0xb4d250e60; 1 drivers
v0xb4cdb3700_26 .net/s v0xb4cdb3700 26, 39 0, L_0xb4d250f00; 1 drivers
v0xb4cdb3700_27 .net/s v0xb4cdb3700 27, 39 0, L_0xb4d250fa0; 1 drivers
v0xb4cdb3700_28 .net/s v0xb4cdb3700 28, 39 0, L_0xb4d251040; 1 drivers
v0xb4cdb3700_29 .net/s v0xb4cdb3700 29, 39 0, L_0xb4d2510e0; 1 drivers
v0xb4cdb3700_30 .net/s v0xb4cdb3700 30, 39 0, L_0xb4d251180; 1 drivers
v0xb4cdb3700_31 .net/s v0xb4cdb3700 31, 39 0, L_0xb4d251220; 1 drivers
v0xb4cdb37a0_0 .var/s "sum", 39 0;
v0xb4cdb3840_0 .net/s "w_bus", 511 0, L_0xb4d24dae0;  alias, 1 drivers
v0xb4cdb38e0_0 .net/s "x_bus", 511 0, L_0xb4d24da40;  alias, 1 drivers
E_0xb4d20d6c0/0 .event anyedge, v0xb4cdb37a0_0, v0xb4cda2f80_0, v0xb4cda35c0_0, v0xb4cda3c00_0;
E_0xb4d20d6c0/1 .event anyedge, v0xb4cda4280_0, v0xb4cda48c0_0, v0xb4cda4f00_0, v0xb4cda5540_0;
E_0xb4d20d6c0/2 .event anyedge, v0xb4cda5b80_0, v0xb4cda61c0_0, v0xb4cda6800_0, v0xb4cda6e40_0;
E_0xb4d20d6c0/3 .event anyedge, v0xb4cda7480_0, v0xb4cda7ac0_0, v0xb4cda8140_0, v0xb4cda8780_0;
E_0xb4d20d6c0/4 .event anyedge, v0xb4cda8dc0_0, v0xb4cda9400_0, v0xb4cda9a40_0, v0xb4cdaa080_0;
E_0xb4d20d6c0/5 .event anyedge, v0xb4cdaa6c0_0, v0xb4cdaad00_0, v0xb4cdab340_0, v0xb4cdab980_0;
E_0xb4d20d6c0/6 .event anyedge, v0xb4cdb0000_0, v0xb4cdb0640_0, v0xb4cdb0c80_0, v0xb4cdb12c0_0;
E_0xb4d20d6c0/7 .event anyedge, v0xb4cdb1900_0, v0xb4cdb1f40_0, v0xb4cdb2580_0, v0xb4cdb2bc0_0;
E_0xb4d20d6c0/8 .event anyedge, v0xb4cdb3200_0;
E_0xb4d20d6c0 .event/or E_0xb4d20d6c0/0, E_0xb4d20d6c0/1, E_0xb4d20d6c0/2, E_0xb4d20d6c0/3, E_0xb4d20d6c0/4, E_0xb4d20d6c0/5, E_0xb4d20d6c0/6, E_0xb4d20d6c0/7, E_0xb4d20d6c0/8;
L_0xb4d24dcc0 .part L_0xb4d24da40, 0, 16;
L_0xb4d24dd60 .part L_0xb4d24dae0, 0, 16;
L_0xb4d24df40 .part L_0xb4d24da40, 16, 16;
L_0xb4d24dfe0 .part L_0xb4d24dae0, 16, 16;
L_0xb4d24e1c0 .part L_0xb4d24da40, 32, 16;
L_0xb4d24e260 .part L_0xb4d24dae0, 32, 16;
L_0xb4d24e440 .part L_0xb4d24da40, 48, 16;
L_0xb4d24e4e0 .part L_0xb4d24dae0, 48, 16;
L_0xb4d24e6c0 .part L_0xb4d24da40, 64, 16;
L_0xb4d24e760 .part L_0xb4d24dae0, 64, 16;
L_0xb4d24e940 .part L_0xb4d24da40, 80, 16;
L_0xb4d24e9e0 .part L_0xb4d24dae0, 80, 16;
L_0xb4d24ebc0 .part L_0xb4d24da40, 96, 16;
L_0xb4d24ec60 .part L_0xb4d24dae0, 96, 16;
L_0xb4d24ee40 .part L_0xb4d24da40, 112, 16;
L_0xb4d24eee0 .part L_0xb4d24dae0, 112, 16;
L_0xb4d24f0c0 .part L_0xb4d24da40, 128, 16;
L_0xb4d24f200 .part L_0xb4d24dae0, 128, 16;
L_0xb4d24f3e0 .part L_0xb4d24da40, 144, 16;
L_0xb4d24f480 .part L_0xb4d24dae0, 144, 16;
L_0xb4d24f660 .part L_0xb4d24da40, 160, 16;
L_0xb4d24f160 .part L_0xb4d24dae0, 160, 16;
L_0xb4d24f840 .part L_0xb4d24da40, 176, 16;
L_0xb4d24f8e0 .part L_0xb4d24dae0, 176, 16;
L_0xb4d24fac0 .part L_0xb4d24da40, 192, 16;
L_0xb4d24fb60 .part L_0xb4d24dae0, 192, 16;
L_0xb4d24fd40 .part L_0xb4d24da40, 208, 16;
L_0xb4d24fde0 .part L_0xb4d24dae0, 208, 16;
L_0xb4d254000 .part L_0xb4d24da40, 224, 16;
L_0xb4d2540a0 .part L_0xb4d24dae0, 224, 16;
L_0xb4d254280 .part L_0xb4d24da40, 240, 16;
L_0xb4d254320 .part L_0xb4d24dae0, 240, 16;
L_0xb4d254500 .part L_0xb4d24da40, 256, 16;
L_0xb4d2545a0 .part L_0xb4d24dae0, 256, 16;
L_0xb4d254780 .part L_0xb4d24da40, 272, 16;
L_0xb4d254820 .part L_0xb4d24dae0, 272, 16;
L_0xb4d254a00 .part L_0xb4d24da40, 288, 16;
L_0xb4d254aa0 .part L_0xb4d24dae0, 288, 16;
L_0xb4d254c80 .part L_0xb4d24da40, 304, 16;
L_0xb4d254d20 .part L_0xb4d24dae0, 304, 16;
L_0xb4d254f00 .part L_0xb4d24da40, 320, 16;
L_0xb4d254fa0 .part L_0xb4d24dae0, 320, 16;
L_0xb4d255180 .part L_0xb4d24da40, 336, 16;
L_0xb4d255220 .part L_0xb4d24dae0, 336, 16;
L_0xb4d255400 .part L_0xb4d24da40, 352, 16;
L_0xb4d2554a0 .part L_0xb4d24dae0, 352, 16;
L_0xb4d255680 .part L_0xb4d24da40, 368, 16;
L_0xb4d255720 .part L_0xb4d24dae0, 368, 16;
L_0xb4d255900 .part L_0xb4d24da40, 384, 16;
L_0xb4d2559a0 .part L_0xb4d24dae0, 384, 16;
L_0xb4d255b80 .part L_0xb4d24da40, 400, 16;
L_0xb4d255c20 .part L_0xb4d24dae0, 400, 16;
L_0xb4d255e00 .part L_0xb4d24da40, 416, 16;
L_0xb4d255ea0 .part L_0xb4d24dae0, 416, 16;
L_0xb4d256080 .part L_0xb4d24da40, 432, 16;
L_0xb4d256120 .part L_0xb4d24dae0, 432, 16;
L_0xb4d256300 .part L_0xb4d24da40, 448, 16;
L_0xb4d2563a0 .part L_0xb4d24dae0, 448, 16;
L_0xb4d256580 .part L_0xb4d24da40, 464, 16;
L_0xb4d256620 .part L_0xb4d24dae0, 464, 16;
L_0xb4d256800 .part L_0xb4d24da40, 480, 16;
L_0xb4d2568a0 .part L_0xb4d24dae0, 480, 16;
L_0xb4d256a80 .part L_0xb4d24da40, 496, 16;
L_0xb4d256b20 .part L_0xb4d24dae0, 496, 16;
L_0xb4d2512c0 .arith/sum 40, v0xb4cdb4500_0, v0xb4cdb37a0_0;
S_0xb4d225f80 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98600 .param/l "i" 1 6 17, +C4<00>;
S_0xb4d226100 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d225f80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8d500 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8d540 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8d580 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cda2c60_0 .net/s *"_ivl_0", 31 0, L_0xb4cdec140;  1 drivers
v0xb4cda2d00_0 .net/s *"_ivl_2", 31 0, L_0xb4cdec1e0;  1 drivers
v0xb4cda2da0_0 .net *"_ivl_7", 0 0, L_0xb4d24db80;  1 drivers
v0xb4cda2e40_0 .net *"_ivl_9", 7 0, L_0xb4d24dc20;  1 drivers
L_0xb4c854cb8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda2ee0_0 .net/s "acc_in", 39 0, L_0xb4c854cb8;  1 drivers
v0xb4cda2f80_0 .net/s "acc_out", 39 0, L_0xb4d18ff20;  alias, 1 drivers
v0xb4cda3020_0 .net/s "product", 31 0, L_0xb4cdec280;  1 drivers
v0xb4cda30c0_0 .net/s "product_ext", 39 0, L_0xb4cdec320;  1 drivers
v0xb4cda3160_0 .net/s "w", 15 0, L_0xb4d24dd60;  1 drivers
v0xb4cda3200_0 .net/s "x", 15 0, L_0xb4d24dcc0;  1 drivers
L_0xb4cdec140 .extend/s 32, L_0xb4d24dcc0;
L_0xb4cdec1e0 .extend/s 32, L_0xb4d24dd60;
L_0xb4cdec280 .arith/mult 32, L_0xb4cdec140, L_0xb4cdec1e0;
L_0xb4d24db80 .part L_0xb4cdec280, 31, 1;
L_0xb4d24dc20 .repeat 8, 8, L_0xb4d24db80;
L_0xb4cdec320 .concat [ 32 8 0 0], L_0xb4cdec280, L_0xb4d24dc20;
L_0xb4d18ff20 .arith/sum 40, L_0xb4c854cb8, L_0xb4cdec320;
S_0xb4d226280 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98640 .param/l "i" 1 6 17, +C4<01>;
S_0xb4d226400 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d226280;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8d5c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8d600 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8d640 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cda32a0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdec3c0;  1 drivers
v0xb4cda3340_0 .net/s *"_ivl_2", 31 0, L_0xb4cdec460;  1 drivers
v0xb4cda33e0_0 .net *"_ivl_7", 0 0, L_0xb4d24de00;  1 drivers
v0xb4cda3480_0 .net *"_ivl_9", 7 0, L_0xb4d24dea0;  1 drivers
L_0xb4c854d00 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda3520_0 .net/s "acc_in", 39 0, L_0xb4c854d00;  1 drivers
v0xb4cda35c0_0 .net/s "acc_out", 39 0, L_0xb4d0bfa20;  alias, 1 drivers
v0xb4cda3660_0 .net/s "product", 31 0, L_0xb4cdec500;  1 drivers
v0xb4cda3700_0 .net/s "product_ext", 39 0, L_0xb4cdec5a0;  1 drivers
v0xb4cda37a0_0 .net/s "w", 15 0, L_0xb4d24dfe0;  1 drivers
v0xb4cda3840_0 .net/s "x", 15 0, L_0xb4d24df40;  1 drivers
L_0xb4cdec3c0 .extend/s 32, L_0xb4d24df40;
L_0xb4cdec460 .extend/s 32, L_0xb4d24dfe0;
L_0xb4cdec500 .arith/mult 32, L_0xb4cdec3c0, L_0xb4cdec460;
L_0xb4d24de00 .part L_0xb4cdec500, 31, 1;
L_0xb4d24dea0 .repeat 8, 8, L_0xb4d24de00;
L_0xb4cdec5a0 .concat [ 32 8 0 0], L_0xb4cdec500, L_0xb4d24dea0;
L_0xb4d0bfa20 .arith/sum 40, L_0xb4c854d00, L_0xb4cdec5a0;
S_0xb4d226580 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98680 .param/l "i" 1 6 17, +C4<010>;
S_0xb4d226700 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d226580;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8d680 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8d6c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8d700 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cda38e0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdec640;  1 drivers
v0xb4cda3980_0 .net/s *"_ivl_2", 31 0, L_0xb4cdec6e0;  1 drivers
v0xb4cda3a20_0 .net *"_ivl_7", 0 0, L_0xb4d24e080;  1 drivers
v0xb4cda3ac0_0 .net *"_ivl_9", 7 0, L_0xb4d24e120;  1 drivers
L_0xb4c854d48 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda3b60_0 .net/s "acc_in", 39 0, L_0xb4c854d48;  1 drivers
v0xb4cda3c00_0 .net/s "acc_out", 39 0, L_0xb4d250000;  alias, 1 drivers
v0xb4cda3ca0_0 .net/s "product", 31 0, L_0xb4cdec780;  1 drivers
v0xb4cda3d40_0 .net/s "product_ext", 39 0, L_0xb4cdec820;  1 drivers
v0xb4cda3de0_0 .net/s "w", 15 0, L_0xb4d24e260;  1 drivers
v0xb4cda3e80_0 .net/s "x", 15 0, L_0xb4d24e1c0;  1 drivers
L_0xb4cdec640 .extend/s 32, L_0xb4d24e1c0;
L_0xb4cdec6e0 .extend/s 32, L_0xb4d24e260;
L_0xb4cdec780 .arith/mult 32, L_0xb4cdec640, L_0xb4cdec6e0;
L_0xb4d24e080 .part L_0xb4cdec780, 31, 1;
L_0xb4d24e120 .repeat 8, 8, L_0xb4d24e080;
L_0xb4cdec820 .concat [ 32 8 0 0], L_0xb4cdec780, L_0xb4d24e120;
L_0xb4d250000 .arith/sum 40, L_0xb4c854d48, L_0xb4cdec820;
S_0xb4d226880 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd986c0 .param/l "i" 1 6 17, +C4<011>;
S_0xb4d226a00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d226880;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8d740 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8d780 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8d7c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cda3f20_0 .net/s *"_ivl_0", 31 0, L_0xb4cdec8c0;  1 drivers
v0xb4cda4000_0 .net/s *"_ivl_2", 31 0, L_0xb4cdec960;  1 drivers
v0xb4cda40a0_0 .net *"_ivl_7", 0 0, L_0xb4d24e300;  1 drivers
v0xb4cda4140_0 .net *"_ivl_9", 7 0, L_0xb4d24e3a0;  1 drivers
L_0xb4c854d90 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda41e0_0 .net/s "acc_in", 39 0, L_0xb4c854d90;  1 drivers
v0xb4cda4280_0 .net/s "acc_out", 39 0, L_0xb4d2500a0;  alias, 1 drivers
v0xb4cda4320_0 .net/s "product", 31 0, L_0xb4cdeca00;  1 drivers
v0xb4cda43c0_0 .net/s "product_ext", 39 0, L_0xb4cdecaa0;  1 drivers
v0xb4cda4460_0 .net/s "w", 15 0, L_0xb4d24e4e0;  1 drivers
v0xb4cda4500_0 .net/s "x", 15 0, L_0xb4d24e440;  1 drivers
L_0xb4cdec8c0 .extend/s 32, L_0xb4d24e440;
L_0xb4cdec960 .extend/s 32, L_0xb4d24e4e0;
L_0xb4cdeca00 .arith/mult 32, L_0xb4cdec8c0, L_0xb4cdec960;
L_0xb4d24e300 .part L_0xb4cdeca00, 31, 1;
L_0xb4d24e3a0 .repeat 8, 8, L_0xb4d24e300;
L_0xb4cdecaa0 .concat [ 32 8 0 0], L_0xb4cdeca00, L_0xb4d24e3a0;
L_0xb4d2500a0 .arith/sum 40, L_0xb4c854d90, L_0xb4cdecaa0;
S_0xb4d226b80 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98700 .param/l "i" 1 6 17, +C4<0100>;
S_0xb4d226d00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d226b80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8d800 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8d840 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8d880 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cda45a0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdecb40;  1 drivers
v0xb4cda4640_0 .net/s *"_ivl_2", 31 0, L_0xb4cdecbe0;  1 drivers
v0xb4cda46e0_0 .net *"_ivl_7", 0 0, L_0xb4d24e580;  1 drivers
v0xb4cda4780_0 .net *"_ivl_9", 7 0, L_0xb4d24e620;  1 drivers
L_0xb4c854dd8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda4820_0 .net/s "acc_in", 39 0, L_0xb4c854dd8;  1 drivers
v0xb4cda48c0_0 .net/s "acc_out", 39 0, L_0xb4d250140;  alias, 1 drivers
v0xb4cda4960_0 .net/s "product", 31 0, L_0xb4cdecc80;  1 drivers
v0xb4cda4a00_0 .net/s "product_ext", 39 0, L_0xb4cdecd20;  1 drivers
v0xb4cda4aa0_0 .net/s "w", 15 0, L_0xb4d24e760;  1 drivers
v0xb4cda4b40_0 .net/s "x", 15 0, L_0xb4d24e6c0;  1 drivers
L_0xb4cdecb40 .extend/s 32, L_0xb4d24e6c0;
L_0xb4cdecbe0 .extend/s 32, L_0xb4d24e760;
L_0xb4cdecc80 .arith/mult 32, L_0xb4cdecb40, L_0xb4cdecbe0;
L_0xb4d24e580 .part L_0xb4cdecc80, 31, 1;
L_0xb4d24e620 .repeat 8, 8, L_0xb4d24e580;
L_0xb4cdecd20 .concat [ 32 8 0 0], L_0xb4cdecc80, L_0xb4d24e620;
L_0xb4d250140 .arith/sum 40, L_0xb4c854dd8, L_0xb4cdecd20;
S_0xb4d226e80 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98740 .param/l "i" 1 6 17, +C4<0101>;
S_0xb4d227000 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d226e80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8d8c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8d900 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8d940 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cda4be0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdecdc0;  1 drivers
v0xb4cda4c80_0 .net/s *"_ivl_2", 31 0, L_0xb4cdece60;  1 drivers
v0xb4cda4d20_0 .net *"_ivl_7", 0 0, L_0xb4d24e800;  1 drivers
v0xb4cda4dc0_0 .net *"_ivl_9", 7 0, L_0xb4d24e8a0;  1 drivers
L_0xb4c854e20 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda4e60_0 .net/s "acc_in", 39 0, L_0xb4c854e20;  1 drivers
v0xb4cda4f00_0 .net/s "acc_out", 39 0, L_0xb4d2501e0;  alias, 1 drivers
v0xb4cda4fa0_0 .net/s "product", 31 0, L_0xb4cdecf00;  1 drivers
v0xb4cda5040_0 .net/s "product_ext", 39 0, L_0xb4cdecfa0;  1 drivers
v0xb4cda50e0_0 .net/s "w", 15 0, L_0xb4d24e9e0;  1 drivers
v0xb4cda5180_0 .net/s "x", 15 0, L_0xb4d24e940;  1 drivers
L_0xb4cdecdc0 .extend/s 32, L_0xb4d24e940;
L_0xb4cdece60 .extend/s 32, L_0xb4d24e9e0;
L_0xb4cdecf00 .arith/mult 32, L_0xb4cdecdc0, L_0xb4cdece60;
L_0xb4d24e800 .part L_0xb4cdecf00, 31, 1;
L_0xb4d24e8a0 .repeat 8, 8, L_0xb4d24e800;
L_0xb4cdecfa0 .concat [ 32 8 0 0], L_0xb4cdecf00, L_0xb4d24e8a0;
L_0xb4d2501e0 .arith/sum 40, L_0xb4c854e20, L_0xb4cdecfa0;
S_0xb4d227180 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98780 .param/l "i" 1 6 17, +C4<0110>;
S_0xb4d227300 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d227180;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8d980 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8d9c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8da00 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cda5220_0 .net/s *"_ivl_0", 31 0, L_0xb4cded040;  1 drivers
v0xb4cda52c0_0 .net/s *"_ivl_2", 31 0, L_0xb4cded0e0;  1 drivers
v0xb4cda5360_0 .net *"_ivl_7", 0 0, L_0xb4d24ea80;  1 drivers
v0xb4cda5400_0 .net *"_ivl_9", 7 0, L_0xb4d24eb20;  1 drivers
L_0xb4c854e68 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda54a0_0 .net/s "acc_in", 39 0, L_0xb4c854e68;  1 drivers
v0xb4cda5540_0 .net/s "acc_out", 39 0, L_0xb4d250280;  alias, 1 drivers
v0xb4cda55e0_0 .net/s "product", 31 0, L_0xb4cded180;  1 drivers
v0xb4cda5680_0 .net/s "product_ext", 39 0, L_0xb4cded220;  1 drivers
v0xb4cda5720_0 .net/s "w", 15 0, L_0xb4d24ec60;  1 drivers
v0xb4cda57c0_0 .net/s "x", 15 0, L_0xb4d24ebc0;  1 drivers
L_0xb4cded040 .extend/s 32, L_0xb4d24ebc0;
L_0xb4cded0e0 .extend/s 32, L_0xb4d24ec60;
L_0xb4cded180 .arith/mult 32, L_0xb4cded040, L_0xb4cded0e0;
L_0xb4d24ea80 .part L_0xb4cded180, 31, 1;
L_0xb4d24eb20 .repeat 8, 8, L_0xb4d24ea80;
L_0xb4cded220 .concat [ 32 8 0 0], L_0xb4cded180, L_0xb4d24eb20;
L_0xb4d250280 .arith/sum 40, L_0xb4c854e68, L_0xb4cded220;
S_0xb4d227480 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd987c0 .param/l "i" 1 6 17, +C4<0111>;
S_0xb4d227600 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d227480;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8da40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8da80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8dac0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cda5860_0 .net/s *"_ivl_0", 31 0, L_0xb4cded2c0;  1 drivers
v0xb4cda5900_0 .net/s *"_ivl_2", 31 0, L_0xb4cded360;  1 drivers
v0xb4cda59a0_0 .net *"_ivl_7", 0 0, L_0xb4d24ed00;  1 drivers
v0xb4cda5a40_0 .net *"_ivl_9", 7 0, L_0xb4d24eda0;  1 drivers
L_0xb4c854eb0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda5ae0_0 .net/s "acc_in", 39 0, L_0xb4c854eb0;  1 drivers
v0xb4cda5b80_0 .net/s "acc_out", 39 0, L_0xb4d250320;  alias, 1 drivers
v0xb4cda5c20_0 .net/s "product", 31 0, L_0xb4cded400;  1 drivers
v0xb4cda5cc0_0 .net/s "product_ext", 39 0, L_0xb4cded4a0;  1 drivers
v0xb4cda5d60_0 .net/s "w", 15 0, L_0xb4d24eee0;  1 drivers
v0xb4cda5e00_0 .net/s "x", 15 0, L_0xb4d24ee40;  1 drivers
L_0xb4cded2c0 .extend/s 32, L_0xb4d24ee40;
L_0xb4cded360 .extend/s 32, L_0xb4d24eee0;
L_0xb4cded400 .arith/mult 32, L_0xb4cded2c0, L_0xb4cded360;
L_0xb4d24ed00 .part L_0xb4cded400, 31, 1;
L_0xb4d24eda0 .repeat 8, 8, L_0xb4d24ed00;
L_0xb4cded4a0 .concat [ 32 8 0 0], L_0xb4cded400, L_0xb4d24eda0;
L_0xb4d250320 .arith/sum 40, L_0xb4c854eb0, L_0xb4cded4a0;
S_0xb4d227780 .scope generate, "GEN_MAC[8]" "GEN_MAC[8]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98800 .param/l "i" 1 6 17, +C4<01000>;
S_0xb4d227900 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d227780;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8db00 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8db40 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8db80 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cda5ea0_0 .net/s *"_ivl_0", 31 0, L_0xb4cded540;  1 drivers
v0xb4cda5f40_0 .net/s *"_ivl_2", 31 0, L_0xb4cded5e0;  1 drivers
v0xb4cda5fe0_0 .net *"_ivl_7", 0 0, L_0xb4d24ef80;  1 drivers
v0xb4cda6080_0 .net *"_ivl_9", 7 0, L_0xb4d24f020;  1 drivers
L_0xb4c854ef8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda6120_0 .net/s "acc_in", 39 0, L_0xb4c854ef8;  1 drivers
v0xb4cda61c0_0 .net/s "acc_out", 39 0, L_0xb4d2503c0;  alias, 1 drivers
v0xb4cda6260_0 .net/s "product", 31 0, L_0xb4cded680;  1 drivers
v0xb4cda6300_0 .net/s "product_ext", 39 0, L_0xb4cded720;  1 drivers
v0xb4cda63a0_0 .net/s "w", 15 0, L_0xb4d24f200;  1 drivers
v0xb4cda6440_0 .net/s "x", 15 0, L_0xb4d24f0c0;  1 drivers
L_0xb4cded540 .extend/s 32, L_0xb4d24f0c0;
L_0xb4cded5e0 .extend/s 32, L_0xb4d24f200;
L_0xb4cded680 .arith/mult 32, L_0xb4cded540, L_0xb4cded5e0;
L_0xb4d24ef80 .part L_0xb4cded680, 31, 1;
L_0xb4d24f020 .repeat 8, 8, L_0xb4d24ef80;
L_0xb4cded720 .concat [ 32 8 0 0], L_0xb4cded680, L_0xb4d24f020;
L_0xb4d2503c0 .arith/sum 40, L_0xb4c854ef8, L_0xb4cded720;
S_0xb4d227a80 .scope generate, "GEN_MAC[9]" "GEN_MAC[9]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98840 .param/l "i" 1 6 17, +C4<01001>;
S_0xb4d227c00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d227a80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8dbc0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8dc00 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8dc40 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cda64e0_0 .net/s *"_ivl_0", 31 0, L_0xb4cded7c0;  1 drivers
v0xb4cda6580_0 .net/s *"_ivl_2", 31 0, L_0xb4cded860;  1 drivers
v0xb4cda6620_0 .net *"_ivl_7", 0 0, L_0xb4d24f2a0;  1 drivers
v0xb4cda66c0_0 .net *"_ivl_9", 7 0, L_0xb4d24f340;  1 drivers
L_0xb4c854f40 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda6760_0 .net/s "acc_in", 39 0, L_0xb4c854f40;  1 drivers
v0xb4cda6800_0 .net/s "acc_out", 39 0, L_0xb4d250460;  alias, 1 drivers
v0xb4cda68a0_0 .net/s "product", 31 0, L_0xb4cded900;  1 drivers
v0xb4cda6940_0 .net/s "product_ext", 39 0, L_0xb4cded9a0;  1 drivers
v0xb4cda69e0_0 .net/s "w", 15 0, L_0xb4d24f480;  1 drivers
v0xb4cda6a80_0 .net/s "x", 15 0, L_0xb4d24f3e0;  1 drivers
L_0xb4cded7c0 .extend/s 32, L_0xb4d24f3e0;
L_0xb4cded860 .extend/s 32, L_0xb4d24f480;
L_0xb4cded900 .arith/mult 32, L_0xb4cded7c0, L_0xb4cded860;
L_0xb4d24f2a0 .part L_0xb4cded900, 31, 1;
L_0xb4d24f340 .repeat 8, 8, L_0xb4d24f2a0;
L_0xb4cded9a0 .concat [ 32 8 0 0], L_0xb4cded900, L_0xb4d24f340;
L_0xb4d250460 .arith/sum 40, L_0xb4c854f40, L_0xb4cded9a0;
S_0xb4d227d80 .scope generate, "GEN_MAC[10]" "GEN_MAC[10]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98880 .param/l "i" 1 6 17, +C4<01010>;
S_0xb4d22c000 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d227d80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8dc80 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8dcc0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8dd00 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cda6b20_0 .net/s *"_ivl_0", 31 0, L_0xb4cdeda40;  1 drivers
v0xb4cda6bc0_0 .net/s *"_ivl_2", 31 0, L_0xb4cdedae0;  1 drivers
v0xb4cda6c60_0 .net *"_ivl_7", 0 0, L_0xb4d24f520;  1 drivers
v0xb4cda6d00_0 .net *"_ivl_9", 7 0, L_0xb4d24f5c0;  1 drivers
L_0xb4c854f88 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda6da0_0 .net/s "acc_in", 39 0, L_0xb4c854f88;  1 drivers
v0xb4cda6e40_0 .net/s "acc_out", 39 0, L_0xb4d250500;  alias, 1 drivers
v0xb4cda6ee0_0 .net/s "product", 31 0, L_0xb4cdedb80;  1 drivers
v0xb4cda6f80_0 .net/s "product_ext", 39 0, L_0xb4cdedc20;  1 drivers
v0xb4cda7020_0 .net/s "w", 15 0, L_0xb4d24f160;  1 drivers
v0xb4cda70c0_0 .net/s "x", 15 0, L_0xb4d24f660;  1 drivers
L_0xb4cdeda40 .extend/s 32, L_0xb4d24f660;
L_0xb4cdedae0 .extend/s 32, L_0xb4d24f160;
L_0xb4cdedb80 .arith/mult 32, L_0xb4cdeda40, L_0xb4cdedae0;
L_0xb4d24f520 .part L_0xb4cdedb80, 31, 1;
L_0xb4d24f5c0 .repeat 8, 8, L_0xb4d24f520;
L_0xb4cdedc20 .concat [ 32 8 0 0], L_0xb4cdedb80, L_0xb4d24f5c0;
L_0xb4d250500 .arith/sum 40, L_0xb4c854f88, L_0xb4cdedc20;
S_0xb4d22c180 .scope generate, "GEN_MAC[11]" "GEN_MAC[11]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd988c0 .param/l "i" 1 6 17, +C4<01011>;
S_0xb4d22c300 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d22c180;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8dd40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8dd80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8ddc0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cda7160_0 .net/s *"_ivl_0", 31 0, L_0xb4cdedcc0;  1 drivers
v0xb4cda7200_0 .net/s *"_ivl_2", 31 0, L_0xb4cdedd60;  1 drivers
v0xb4cda72a0_0 .net *"_ivl_7", 0 0, L_0xb4d24f700;  1 drivers
v0xb4cda7340_0 .net *"_ivl_9", 7 0, L_0xb4d24f7a0;  1 drivers
L_0xb4c854fd0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda73e0_0 .net/s "acc_in", 39 0, L_0xb4c854fd0;  1 drivers
v0xb4cda7480_0 .net/s "acc_out", 39 0, L_0xb4d2505a0;  alias, 1 drivers
v0xb4cda7520_0 .net/s "product", 31 0, L_0xb4cdede00;  1 drivers
v0xb4cda75c0_0 .net/s "product_ext", 39 0, L_0xb4cdedea0;  1 drivers
v0xb4cda7660_0 .net/s "w", 15 0, L_0xb4d24f8e0;  1 drivers
v0xb4cda7700_0 .net/s "x", 15 0, L_0xb4d24f840;  1 drivers
L_0xb4cdedcc0 .extend/s 32, L_0xb4d24f840;
L_0xb4cdedd60 .extend/s 32, L_0xb4d24f8e0;
L_0xb4cdede00 .arith/mult 32, L_0xb4cdedcc0, L_0xb4cdedd60;
L_0xb4d24f700 .part L_0xb4cdede00, 31, 1;
L_0xb4d24f7a0 .repeat 8, 8, L_0xb4d24f700;
L_0xb4cdedea0 .concat [ 32 8 0 0], L_0xb4cdede00, L_0xb4d24f7a0;
L_0xb4d2505a0 .arith/sum 40, L_0xb4c854fd0, L_0xb4cdedea0;
S_0xb4d22c480 .scope generate, "GEN_MAC[12]" "GEN_MAC[12]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98900 .param/l "i" 1 6 17, +C4<01100>;
S_0xb4d22c600 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d22c480;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8de00 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8de40 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8de80 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cda77a0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdedf40;  1 drivers
v0xb4cda7840_0 .net/s *"_ivl_2", 31 0, L_0xb4cdedfe0;  1 drivers
v0xb4cda78e0_0 .net *"_ivl_7", 0 0, L_0xb4d24f980;  1 drivers
v0xb4cda7980_0 .net *"_ivl_9", 7 0, L_0xb4d24fa20;  1 drivers
L_0xb4c855018 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda7a20_0 .net/s "acc_in", 39 0, L_0xb4c855018;  1 drivers
v0xb4cda7ac0_0 .net/s "acc_out", 39 0, L_0xb4d250640;  alias, 1 drivers
v0xb4cda7b60_0 .net/s "product", 31 0, L_0xb4cdee080;  1 drivers
v0xb4cda7c00_0 .net/s "product_ext", 39 0, L_0xb4cdee120;  1 drivers
v0xb4cda7ca0_0 .net/s "w", 15 0, L_0xb4d24fb60;  1 drivers
v0xb4cda7d40_0 .net/s "x", 15 0, L_0xb4d24fac0;  1 drivers
L_0xb4cdedf40 .extend/s 32, L_0xb4d24fac0;
L_0xb4cdedfe0 .extend/s 32, L_0xb4d24fb60;
L_0xb4cdee080 .arith/mult 32, L_0xb4cdedf40, L_0xb4cdedfe0;
L_0xb4d24f980 .part L_0xb4cdee080, 31, 1;
L_0xb4d24fa20 .repeat 8, 8, L_0xb4d24f980;
L_0xb4cdee120 .concat [ 32 8 0 0], L_0xb4cdee080, L_0xb4d24fa20;
L_0xb4d250640 .arith/sum 40, L_0xb4c855018, L_0xb4cdee120;
S_0xb4d22c780 .scope generate, "GEN_MAC[13]" "GEN_MAC[13]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98940 .param/l "i" 1 6 17, +C4<01101>;
S_0xb4d22c900 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d22c780;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8dec0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8df00 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8df40 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cda7de0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdee1c0;  1 drivers
v0xb4cda7e80_0 .net/s *"_ivl_2", 31 0, L_0xb4cdee260;  1 drivers
v0xb4cda7f20_0 .net *"_ivl_7", 0 0, L_0xb4d24fc00;  1 drivers
v0xb4cda8000_0 .net *"_ivl_9", 7 0, L_0xb4d24fca0;  1 drivers
L_0xb4c855060 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda80a0_0 .net/s "acc_in", 39 0, L_0xb4c855060;  1 drivers
v0xb4cda8140_0 .net/s "acc_out", 39 0, L_0xb4d2506e0;  alias, 1 drivers
v0xb4cda81e0_0 .net/s "product", 31 0, L_0xb4cdee300;  1 drivers
v0xb4cda8280_0 .net/s "product_ext", 39 0, L_0xb4cdee3a0;  1 drivers
v0xb4cda8320_0 .net/s "w", 15 0, L_0xb4d24fde0;  1 drivers
v0xb4cda83c0_0 .net/s "x", 15 0, L_0xb4d24fd40;  1 drivers
L_0xb4cdee1c0 .extend/s 32, L_0xb4d24fd40;
L_0xb4cdee260 .extend/s 32, L_0xb4d24fde0;
L_0xb4cdee300 .arith/mult 32, L_0xb4cdee1c0, L_0xb4cdee260;
L_0xb4d24fc00 .part L_0xb4cdee300, 31, 1;
L_0xb4d24fca0 .repeat 8, 8, L_0xb4d24fc00;
L_0xb4cdee3a0 .concat [ 32 8 0 0], L_0xb4cdee300, L_0xb4d24fca0;
L_0xb4d2506e0 .arith/sum 40, L_0xb4c855060, L_0xb4cdee3a0;
S_0xb4d22ca80 .scope generate, "GEN_MAC[14]" "GEN_MAC[14]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98980 .param/l "i" 1 6 17, +C4<01110>;
S_0xb4d22cc00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d22ca80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8df80 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8dfc0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8e000 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cda8460_0 .net/s *"_ivl_0", 31 0, L_0xb4cdee440;  1 drivers
v0xb4cda8500_0 .net/s *"_ivl_2", 31 0, L_0xb4cdee4e0;  1 drivers
v0xb4cda85a0_0 .net *"_ivl_7", 0 0, L_0xb4d24fe80;  1 drivers
v0xb4cda8640_0 .net *"_ivl_9", 7 0, L_0xb4d24ff20;  1 drivers
L_0xb4c8550a8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda86e0_0 .net/s "acc_in", 39 0, L_0xb4c8550a8;  1 drivers
v0xb4cda8780_0 .net/s "acc_out", 39 0, L_0xb4d250780;  alias, 1 drivers
v0xb4cda8820_0 .net/s "product", 31 0, L_0xb4cdee580;  1 drivers
v0xb4cda88c0_0 .net/s "product_ext", 39 0, L_0xb4cdee620;  1 drivers
v0xb4cda8960_0 .net/s "w", 15 0, L_0xb4d2540a0;  1 drivers
v0xb4cda8a00_0 .net/s "x", 15 0, L_0xb4d254000;  1 drivers
L_0xb4cdee440 .extend/s 32, L_0xb4d254000;
L_0xb4cdee4e0 .extend/s 32, L_0xb4d2540a0;
L_0xb4cdee580 .arith/mult 32, L_0xb4cdee440, L_0xb4cdee4e0;
L_0xb4d24fe80 .part L_0xb4cdee580, 31, 1;
L_0xb4d24ff20 .repeat 8, 8, L_0xb4d24fe80;
L_0xb4cdee620 .concat [ 32 8 0 0], L_0xb4cdee580, L_0xb4d24ff20;
L_0xb4d250780 .arith/sum 40, L_0xb4c8550a8, L_0xb4cdee620;
S_0xb4d22cd80 .scope generate, "GEN_MAC[15]" "GEN_MAC[15]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd989c0 .param/l "i" 1 6 17, +C4<01111>;
S_0xb4d22cf00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d22cd80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8e040 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8e080 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8e0c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cda8aa0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdee6c0;  1 drivers
v0xb4cda8b40_0 .net/s *"_ivl_2", 31 0, L_0xb4cdee760;  1 drivers
v0xb4cda8be0_0 .net *"_ivl_7", 0 0, L_0xb4d254140;  1 drivers
v0xb4cda8c80_0 .net *"_ivl_9", 7 0, L_0xb4d2541e0;  1 drivers
L_0xb4c8550f0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda8d20_0 .net/s "acc_in", 39 0, L_0xb4c8550f0;  1 drivers
v0xb4cda8dc0_0 .net/s "acc_out", 39 0, L_0xb4d250820;  alias, 1 drivers
v0xb4cda8e60_0 .net/s "product", 31 0, L_0xb4cdee800;  1 drivers
v0xb4cda8f00_0 .net/s "product_ext", 39 0, L_0xb4cdee8a0;  1 drivers
v0xb4cda8fa0_0 .net/s "w", 15 0, L_0xb4d254320;  1 drivers
v0xb4cda9040_0 .net/s "x", 15 0, L_0xb4d254280;  1 drivers
L_0xb4cdee6c0 .extend/s 32, L_0xb4d254280;
L_0xb4cdee760 .extend/s 32, L_0xb4d254320;
L_0xb4cdee800 .arith/mult 32, L_0xb4cdee6c0, L_0xb4cdee760;
L_0xb4d254140 .part L_0xb4cdee800, 31, 1;
L_0xb4d2541e0 .repeat 8, 8, L_0xb4d254140;
L_0xb4cdee8a0 .concat [ 32 8 0 0], L_0xb4cdee800, L_0xb4d2541e0;
L_0xb4d250820 .arith/sum 40, L_0xb4c8550f0, L_0xb4cdee8a0;
S_0xb4d22d080 .scope generate, "GEN_MAC[16]" "GEN_MAC[16]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98a00 .param/l "i" 1 6 17, +C4<010000>;
S_0xb4d22d200 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d22d080;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8e100 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8e140 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8e180 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cda90e0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdee940;  1 drivers
v0xb4cda9180_0 .net/s *"_ivl_2", 31 0, L_0xb4cdee9e0;  1 drivers
v0xb4cda9220_0 .net *"_ivl_7", 0 0, L_0xb4d2543c0;  1 drivers
v0xb4cda92c0_0 .net *"_ivl_9", 7 0, L_0xb4d254460;  1 drivers
L_0xb4c855138 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda9360_0 .net/s "acc_in", 39 0, L_0xb4c855138;  1 drivers
v0xb4cda9400_0 .net/s "acc_out", 39 0, L_0xb4d2508c0;  alias, 1 drivers
v0xb4cda94a0_0 .net/s "product", 31 0, L_0xb4cdeea80;  1 drivers
v0xb4cda9540_0 .net/s "product_ext", 39 0, L_0xb4cdeeb20;  1 drivers
v0xb4cda95e0_0 .net/s "w", 15 0, L_0xb4d2545a0;  1 drivers
v0xb4cda9680_0 .net/s "x", 15 0, L_0xb4d254500;  1 drivers
L_0xb4cdee940 .extend/s 32, L_0xb4d254500;
L_0xb4cdee9e0 .extend/s 32, L_0xb4d2545a0;
L_0xb4cdeea80 .arith/mult 32, L_0xb4cdee940, L_0xb4cdee9e0;
L_0xb4d2543c0 .part L_0xb4cdeea80, 31, 1;
L_0xb4d254460 .repeat 8, 8, L_0xb4d2543c0;
L_0xb4cdeeb20 .concat [ 32 8 0 0], L_0xb4cdeea80, L_0xb4d254460;
L_0xb4d2508c0 .arith/sum 40, L_0xb4c855138, L_0xb4cdeeb20;
S_0xb4d22d380 .scope generate, "GEN_MAC[17]" "GEN_MAC[17]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98a40 .param/l "i" 1 6 17, +C4<010001>;
S_0xb4d22d500 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d22d380;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8e1c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8e200 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8e240 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cda9720_0 .net/s *"_ivl_0", 31 0, L_0xb4cdeebc0;  1 drivers
v0xb4cda97c0_0 .net/s *"_ivl_2", 31 0, L_0xb4cdeec60;  1 drivers
v0xb4cda9860_0 .net *"_ivl_7", 0 0, L_0xb4d254640;  1 drivers
v0xb4cda9900_0 .net *"_ivl_9", 7 0, L_0xb4d2546e0;  1 drivers
L_0xb4c855180 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda99a0_0 .net/s "acc_in", 39 0, L_0xb4c855180;  1 drivers
v0xb4cda9a40_0 .net/s "acc_out", 39 0, L_0xb4d250960;  alias, 1 drivers
v0xb4cda9ae0_0 .net/s "product", 31 0, L_0xb4cdeed00;  1 drivers
v0xb4cda9b80_0 .net/s "product_ext", 39 0, L_0xb4cdeeda0;  1 drivers
v0xb4cda9c20_0 .net/s "w", 15 0, L_0xb4d254820;  1 drivers
v0xb4cda9cc0_0 .net/s "x", 15 0, L_0xb4d254780;  1 drivers
L_0xb4cdeebc0 .extend/s 32, L_0xb4d254780;
L_0xb4cdeec60 .extend/s 32, L_0xb4d254820;
L_0xb4cdeed00 .arith/mult 32, L_0xb4cdeebc0, L_0xb4cdeec60;
L_0xb4d254640 .part L_0xb4cdeed00, 31, 1;
L_0xb4d2546e0 .repeat 8, 8, L_0xb4d254640;
L_0xb4cdeeda0 .concat [ 32 8 0 0], L_0xb4cdeed00, L_0xb4d2546e0;
L_0xb4d250960 .arith/sum 40, L_0xb4c855180, L_0xb4cdeeda0;
S_0xb4d22d680 .scope generate, "GEN_MAC[18]" "GEN_MAC[18]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98a80 .param/l "i" 1 6 17, +C4<010010>;
S_0xb4d22d800 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d22d680;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8e280 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8e2c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8e300 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cda9d60_0 .net/s *"_ivl_0", 31 0, L_0xb4cdeee40;  1 drivers
v0xb4cda9e00_0 .net/s *"_ivl_2", 31 0, L_0xb4cdeeee0;  1 drivers
v0xb4cda9ea0_0 .net *"_ivl_7", 0 0, L_0xb4d2548c0;  1 drivers
v0xb4cda9f40_0 .net *"_ivl_9", 7 0, L_0xb4d254960;  1 drivers
L_0xb4c8551c8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cda9fe0_0 .net/s "acc_in", 39 0, L_0xb4c8551c8;  1 drivers
v0xb4cdaa080_0 .net/s "acc_out", 39 0, L_0xb4d250a00;  alias, 1 drivers
v0xb4cdaa120_0 .net/s "product", 31 0, L_0xb4cdeef80;  1 drivers
v0xb4cdaa1c0_0 .net/s "product_ext", 39 0, L_0xb4cdef020;  1 drivers
v0xb4cdaa260_0 .net/s "w", 15 0, L_0xb4d254aa0;  1 drivers
v0xb4cdaa300_0 .net/s "x", 15 0, L_0xb4d254a00;  1 drivers
L_0xb4cdeee40 .extend/s 32, L_0xb4d254a00;
L_0xb4cdeeee0 .extend/s 32, L_0xb4d254aa0;
L_0xb4cdeef80 .arith/mult 32, L_0xb4cdeee40, L_0xb4cdeeee0;
L_0xb4d2548c0 .part L_0xb4cdeef80, 31, 1;
L_0xb4d254960 .repeat 8, 8, L_0xb4d2548c0;
L_0xb4cdef020 .concat [ 32 8 0 0], L_0xb4cdeef80, L_0xb4d254960;
L_0xb4d250a00 .arith/sum 40, L_0xb4c8551c8, L_0xb4cdef020;
S_0xb4d22d980 .scope generate, "GEN_MAC[19]" "GEN_MAC[19]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98ac0 .param/l "i" 1 6 17, +C4<010011>;
S_0xb4d22db00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d22d980;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8e340 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8e380 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8e3c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdaa3a0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdef0c0;  1 drivers
v0xb4cdaa440_0 .net/s *"_ivl_2", 31 0, L_0xb4cdef160;  1 drivers
v0xb4cdaa4e0_0 .net *"_ivl_7", 0 0, L_0xb4d254b40;  1 drivers
v0xb4cdaa580_0 .net *"_ivl_9", 7 0, L_0xb4d254be0;  1 drivers
L_0xb4c855210 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdaa620_0 .net/s "acc_in", 39 0, L_0xb4c855210;  1 drivers
v0xb4cdaa6c0_0 .net/s "acc_out", 39 0, L_0xb4d250aa0;  alias, 1 drivers
v0xb4cdaa760_0 .net/s "product", 31 0, L_0xb4cdef200;  1 drivers
v0xb4cdaa800_0 .net/s "product_ext", 39 0, L_0xb4cdef2a0;  1 drivers
v0xb4cdaa8a0_0 .net/s "w", 15 0, L_0xb4d254d20;  1 drivers
v0xb4cdaa940_0 .net/s "x", 15 0, L_0xb4d254c80;  1 drivers
L_0xb4cdef0c0 .extend/s 32, L_0xb4d254c80;
L_0xb4cdef160 .extend/s 32, L_0xb4d254d20;
L_0xb4cdef200 .arith/mult 32, L_0xb4cdef0c0, L_0xb4cdef160;
L_0xb4d254b40 .part L_0xb4cdef200, 31, 1;
L_0xb4d254be0 .repeat 8, 8, L_0xb4d254b40;
L_0xb4cdef2a0 .concat [ 32 8 0 0], L_0xb4cdef200, L_0xb4d254be0;
L_0xb4d250aa0 .arith/sum 40, L_0xb4c855210, L_0xb4cdef2a0;
S_0xb4d22dc80 .scope generate, "GEN_MAC[20]" "GEN_MAC[20]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98b00 .param/l "i" 1 6 17, +C4<010100>;
S_0xb4d22de00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d22dc80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8e400 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8e440 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8e480 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdaa9e0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdef340;  1 drivers
v0xb4cdaaa80_0 .net/s *"_ivl_2", 31 0, L_0xb4cdef3e0;  1 drivers
v0xb4cdaab20_0 .net *"_ivl_7", 0 0, L_0xb4d254dc0;  1 drivers
v0xb4cdaabc0_0 .net *"_ivl_9", 7 0, L_0xb4d254e60;  1 drivers
L_0xb4c855258 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdaac60_0 .net/s "acc_in", 39 0, L_0xb4c855258;  1 drivers
v0xb4cdaad00_0 .net/s "acc_out", 39 0, L_0xb4d250b40;  alias, 1 drivers
v0xb4cdaada0_0 .net/s "product", 31 0, L_0xb4cdef480;  1 drivers
v0xb4cdaae40_0 .net/s "product_ext", 39 0, L_0xb4cdef520;  1 drivers
v0xb4cdaaee0_0 .net/s "w", 15 0, L_0xb4d254fa0;  1 drivers
v0xb4cdaaf80_0 .net/s "x", 15 0, L_0xb4d254f00;  1 drivers
L_0xb4cdef340 .extend/s 32, L_0xb4d254f00;
L_0xb4cdef3e0 .extend/s 32, L_0xb4d254fa0;
L_0xb4cdef480 .arith/mult 32, L_0xb4cdef340, L_0xb4cdef3e0;
L_0xb4d254dc0 .part L_0xb4cdef480, 31, 1;
L_0xb4d254e60 .repeat 8, 8, L_0xb4d254dc0;
L_0xb4cdef520 .concat [ 32 8 0 0], L_0xb4cdef480, L_0xb4d254e60;
L_0xb4d250b40 .arith/sum 40, L_0xb4c855258, L_0xb4cdef520;
S_0xb4d22df80 .scope generate, "GEN_MAC[21]" "GEN_MAC[21]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98b40 .param/l "i" 1 6 17, +C4<010101>;
S_0xb4d22e100 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d22df80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8e4c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8e500 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8e540 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdab020_0 .net/s *"_ivl_0", 31 0, L_0xb4cdef5c0;  1 drivers
v0xb4cdab0c0_0 .net/s *"_ivl_2", 31 0, L_0xb4cdef660;  1 drivers
v0xb4cdab160_0 .net *"_ivl_7", 0 0, L_0xb4d255040;  1 drivers
v0xb4cdab200_0 .net *"_ivl_9", 7 0, L_0xb4d2550e0;  1 drivers
L_0xb4c8552a0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdab2a0_0 .net/s "acc_in", 39 0, L_0xb4c8552a0;  1 drivers
v0xb4cdab340_0 .net/s "acc_out", 39 0, L_0xb4d250be0;  alias, 1 drivers
v0xb4cdab3e0_0 .net/s "product", 31 0, L_0xb4cdef700;  1 drivers
v0xb4cdab480_0 .net/s "product_ext", 39 0, L_0xb4cdef7a0;  1 drivers
v0xb4cdab520_0 .net/s "w", 15 0, L_0xb4d255220;  1 drivers
v0xb4cdab5c0_0 .net/s "x", 15 0, L_0xb4d255180;  1 drivers
L_0xb4cdef5c0 .extend/s 32, L_0xb4d255180;
L_0xb4cdef660 .extend/s 32, L_0xb4d255220;
L_0xb4cdef700 .arith/mult 32, L_0xb4cdef5c0, L_0xb4cdef660;
L_0xb4d255040 .part L_0xb4cdef700, 31, 1;
L_0xb4d2550e0 .repeat 8, 8, L_0xb4d255040;
L_0xb4cdef7a0 .concat [ 32 8 0 0], L_0xb4cdef700, L_0xb4d2550e0;
L_0xb4d250be0 .arith/sum 40, L_0xb4c8552a0, L_0xb4cdef7a0;
S_0xb4d22e280 .scope generate, "GEN_MAC[22]" "GEN_MAC[22]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98b80 .param/l "i" 1 6 17, +C4<010110>;
S_0xb4d22e400 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d22e280;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8e580 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8e5c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8e600 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdab660_0 .net/s *"_ivl_0", 31 0, L_0xb4cdef840;  1 drivers
v0xb4cdab700_0 .net/s *"_ivl_2", 31 0, L_0xb4cdef8e0;  1 drivers
v0xb4cdab7a0_0 .net *"_ivl_7", 0 0, L_0xb4d2552c0;  1 drivers
v0xb4cdab840_0 .net *"_ivl_9", 7 0, L_0xb4d255360;  1 drivers
L_0xb4c8552e8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdab8e0_0 .net/s "acc_in", 39 0, L_0xb4c8552e8;  1 drivers
v0xb4cdab980_0 .net/s "acc_out", 39 0, L_0xb4d250c80;  alias, 1 drivers
v0xb4cdaba20_0 .net/s "product", 31 0, L_0xb4cdef980;  1 drivers
v0xb4cdabac0_0 .net/s "product_ext", 39 0, L_0xb4cdefa20;  1 drivers
v0xb4cdabb60_0 .net/s "w", 15 0, L_0xb4d2554a0;  1 drivers
v0xb4cdabc00_0 .net/s "x", 15 0, L_0xb4d255400;  1 drivers
L_0xb4cdef840 .extend/s 32, L_0xb4d255400;
L_0xb4cdef8e0 .extend/s 32, L_0xb4d2554a0;
L_0xb4cdef980 .arith/mult 32, L_0xb4cdef840, L_0xb4cdef8e0;
L_0xb4d2552c0 .part L_0xb4cdef980, 31, 1;
L_0xb4d255360 .repeat 8, 8, L_0xb4d2552c0;
L_0xb4cdefa20 .concat [ 32 8 0 0], L_0xb4cdef980, L_0xb4d255360;
L_0xb4d250c80 .arith/sum 40, L_0xb4c8552e8, L_0xb4cdefa20;
S_0xb4d22e580 .scope generate, "GEN_MAC[23]" "GEN_MAC[23]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98bc0 .param/l "i" 1 6 17, +C4<010111>;
S_0xb4d22e700 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d22e580;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8e640 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8e680 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8e6c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdabca0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdefac0;  1 drivers
v0xb4cdabd40_0 .net/s *"_ivl_2", 31 0, L_0xb4cdefb60;  1 drivers
v0xb4cdabde0_0 .net *"_ivl_7", 0 0, L_0xb4d255540;  1 drivers
v0xb4cdabe80_0 .net *"_ivl_9", 7 0, L_0xb4d2555e0;  1 drivers
L_0xb4c855330 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdabf20_0 .net/s "acc_in", 39 0, L_0xb4c855330;  1 drivers
v0xb4cdb0000_0 .net/s "acc_out", 39 0, L_0xb4d250d20;  alias, 1 drivers
v0xb4cdb00a0_0 .net/s "product", 31 0, L_0xb4cdefc00;  1 drivers
v0xb4cdb0140_0 .net/s "product_ext", 39 0, L_0xb4cdefca0;  1 drivers
v0xb4cdb01e0_0 .net/s "w", 15 0, L_0xb4d255720;  1 drivers
v0xb4cdb0280_0 .net/s "x", 15 0, L_0xb4d255680;  1 drivers
L_0xb4cdefac0 .extend/s 32, L_0xb4d255680;
L_0xb4cdefb60 .extend/s 32, L_0xb4d255720;
L_0xb4cdefc00 .arith/mult 32, L_0xb4cdefac0, L_0xb4cdefb60;
L_0xb4d255540 .part L_0xb4cdefc00, 31, 1;
L_0xb4d2555e0 .repeat 8, 8, L_0xb4d255540;
L_0xb4cdefca0 .concat [ 32 8 0 0], L_0xb4cdefc00, L_0xb4d2555e0;
L_0xb4d250d20 .arith/sum 40, L_0xb4c855330, L_0xb4cdefca0;
S_0xb4d22e880 .scope generate, "GEN_MAC[24]" "GEN_MAC[24]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98c00 .param/l "i" 1 6 17, +C4<011000>;
S_0xb4d22ea00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d22e880;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8e700 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8e740 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8e780 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdb0320_0 .net/s *"_ivl_0", 31 0, L_0xb4cdefd40;  1 drivers
v0xb4cdb03c0_0 .net/s *"_ivl_2", 31 0, L_0xb4cdefde0;  1 drivers
v0xb4cdb0460_0 .net *"_ivl_7", 0 0, L_0xb4d2557c0;  1 drivers
v0xb4cdb0500_0 .net *"_ivl_9", 7 0, L_0xb4d255860;  1 drivers
L_0xb4c855378 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb05a0_0 .net/s "acc_in", 39 0, L_0xb4c855378;  1 drivers
v0xb4cdb0640_0 .net/s "acc_out", 39 0, L_0xb4d250dc0;  alias, 1 drivers
v0xb4cdb06e0_0 .net/s "product", 31 0, L_0xb4cdefe80;  1 drivers
v0xb4cdb0780_0 .net/s "product_ext", 39 0, L_0xb4cdeff20;  1 drivers
v0xb4cdb0820_0 .net/s "w", 15 0, L_0xb4d2559a0;  1 drivers
v0xb4cdb08c0_0 .net/s "x", 15 0, L_0xb4d255900;  1 drivers
L_0xb4cdefd40 .extend/s 32, L_0xb4d255900;
L_0xb4cdefde0 .extend/s 32, L_0xb4d2559a0;
L_0xb4cdefe80 .arith/mult 32, L_0xb4cdefd40, L_0xb4cdefde0;
L_0xb4d2557c0 .part L_0xb4cdefe80, 31, 1;
L_0xb4d255860 .repeat 8, 8, L_0xb4d2557c0;
L_0xb4cdeff20 .concat [ 32 8 0 0], L_0xb4cdefe80, L_0xb4d255860;
L_0xb4d250dc0 .arith/sum 40, L_0xb4c855378, L_0xb4cdeff20;
S_0xb4d22eb80 .scope generate, "GEN_MAC[25]" "GEN_MAC[25]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98c40 .param/l "i" 1 6 17, +C4<011001>;
S_0xb4d22ed00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d22eb80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8e7c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8e800 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8e840 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdb0960_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf4000;  1 drivers
v0xb4cdb0a00_0 .net/s *"_ivl_2", 31 0, L_0xb4cdf40a0;  1 drivers
v0xb4cdb0aa0_0 .net *"_ivl_7", 0 0, L_0xb4d255a40;  1 drivers
v0xb4cdb0b40_0 .net *"_ivl_9", 7 0, L_0xb4d255ae0;  1 drivers
L_0xb4c8553c0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb0be0_0 .net/s "acc_in", 39 0, L_0xb4c8553c0;  1 drivers
v0xb4cdb0c80_0 .net/s "acc_out", 39 0, L_0xb4d250e60;  alias, 1 drivers
v0xb4cdb0d20_0 .net/s "product", 31 0, L_0xb4cdf4140;  1 drivers
v0xb4cdb0dc0_0 .net/s "product_ext", 39 0, L_0xb4cdf41e0;  1 drivers
v0xb4cdb0e60_0 .net/s "w", 15 0, L_0xb4d255c20;  1 drivers
v0xb4cdb0f00_0 .net/s "x", 15 0, L_0xb4d255b80;  1 drivers
L_0xb4cdf4000 .extend/s 32, L_0xb4d255b80;
L_0xb4cdf40a0 .extend/s 32, L_0xb4d255c20;
L_0xb4cdf4140 .arith/mult 32, L_0xb4cdf4000, L_0xb4cdf40a0;
L_0xb4d255a40 .part L_0xb4cdf4140, 31, 1;
L_0xb4d255ae0 .repeat 8, 8, L_0xb4d255a40;
L_0xb4cdf41e0 .concat [ 32 8 0 0], L_0xb4cdf4140, L_0xb4d255ae0;
L_0xb4d250e60 .arith/sum 40, L_0xb4c8553c0, L_0xb4cdf41e0;
S_0xb4d22ee80 .scope generate, "GEN_MAC[26]" "GEN_MAC[26]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98c80 .param/l "i" 1 6 17, +C4<011010>;
S_0xb4d22f000 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d22ee80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8e880 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8e8c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8e900 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdb0fa0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf4280;  1 drivers
v0xb4cdb1040_0 .net/s *"_ivl_2", 31 0, L_0xb4cdf4320;  1 drivers
v0xb4cdb10e0_0 .net *"_ivl_7", 0 0, L_0xb4d255cc0;  1 drivers
v0xb4cdb1180_0 .net *"_ivl_9", 7 0, L_0xb4d255d60;  1 drivers
L_0xb4c855408 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb1220_0 .net/s "acc_in", 39 0, L_0xb4c855408;  1 drivers
v0xb4cdb12c0_0 .net/s "acc_out", 39 0, L_0xb4d250f00;  alias, 1 drivers
v0xb4cdb1360_0 .net/s "product", 31 0, L_0xb4cdf43c0;  1 drivers
v0xb4cdb1400_0 .net/s "product_ext", 39 0, L_0xb4cdf4460;  1 drivers
v0xb4cdb14a0_0 .net/s "w", 15 0, L_0xb4d255ea0;  1 drivers
v0xb4cdb1540_0 .net/s "x", 15 0, L_0xb4d255e00;  1 drivers
L_0xb4cdf4280 .extend/s 32, L_0xb4d255e00;
L_0xb4cdf4320 .extend/s 32, L_0xb4d255ea0;
L_0xb4cdf43c0 .arith/mult 32, L_0xb4cdf4280, L_0xb4cdf4320;
L_0xb4d255cc0 .part L_0xb4cdf43c0, 31, 1;
L_0xb4d255d60 .repeat 8, 8, L_0xb4d255cc0;
L_0xb4cdf4460 .concat [ 32 8 0 0], L_0xb4cdf43c0, L_0xb4d255d60;
L_0xb4d250f00 .arith/sum 40, L_0xb4c855408, L_0xb4cdf4460;
S_0xb4d22f180 .scope generate, "GEN_MAC[27]" "GEN_MAC[27]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98cc0 .param/l "i" 1 6 17, +C4<011011>;
S_0xb4d22f300 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d22f180;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8e940 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8e980 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8e9c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdb15e0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf4500;  1 drivers
v0xb4cdb1680_0 .net/s *"_ivl_2", 31 0, L_0xb4cdf45a0;  1 drivers
v0xb4cdb1720_0 .net *"_ivl_7", 0 0, L_0xb4d255f40;  1 drivers
v0xb4cdb17c0_0 .net *"_ivl_9", 7 0, L_0xb4d255fe0;  1 drivers
L_0xb4c855450 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb1860_0 .net/s "acc_in", 39 0, L_0xb4c855450;  1 drivers
v0xb4cdb1900_0 .net/s "acc_out", 39 0, L_0xb4d250fa0;  alias, 1 drivers
v0xb4cdb19a0_0 .net/s "product", 31 0, L_0xb4cdf4640;  1 drivers
v0xb4cdb1a40_0 .net/s "product_ext", 39 0, L_0xb4cdf46e0;  1 drivers
v0xb4cdb1ae0_0 .net/s "w", 15 0, L_0xb4d256120;  1 drivers
v0xb4cdb1b80_0 .net/s "x", 15 0, L_0xb4d256080;  1 drivers
L_0xb4cdf4500 .extend/s 32, L_0xb4d256080;
L_0xb4cdf45a0 .extend/s 32, L_0xb4d256120;
L_0xb4cdf4640 .arith/mult 32, L_0xb4cdf4500, L_0xb4cdf45a0;
L_0xb4d255f40 .part L_0xb4cdf4640, 31, 1;
L_0xb4d255fe0 .repeat 8, 8, L_0xb4d255f40;
L_0xb4cdf46e0 .concat [ 32 8 0 0], L_0xb4cdf4640, L_0xb4d255fe0;
L_0xb4d250fa0 .arith/sum 40, L_0xb4c855450, L_0xb4cdf46e0;
S_0xb4d22f480 .scope generate, "GEN_MAC[28]" "GEN_MAC[28]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98d00 .param/l "i" 1 6 17, +C4<011100>;
S_0xb4d22f600 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d22f480;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8ea00 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8ea40 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8ea80 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdb1c20_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf4780;  1 drivers
v0xb4cdb1cc0_0 .net/s *"_ivl_2", 31 0, L_0xb4cdf4820;  1 drivers
v0xb4cdb1d60_0 .net *"_ivl_7", 0 0, L_0xb4d2561c0;  1 drivers
v0xb4cdb1e00_0 .net *"_ivl_9", 7 0, L_0xb4d256260;  1 drivers
L_0xb4c855498 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb1ea0_0 .net/s "acc_in", 39 0, L_0xb4c855498;  1 drivers
v0xb4cdb1f40_0 .net/s "acc_out", 39 0, L_0xb4d251040;  alias, 1 drivers
v0xb4cdb1fe0_0 .net/s "product", 31 0, L_0xb4cdf48c0;  1 drivers
v0xb4cdb2080_0 .net/s "product_ext", 39 0, L_0xb4cdf4960;  1 drivers
v0xb4cdb2120_0 .net/s "w", 15 0, L_0xb4d2563a0;  1 drivers
v0xb4cdb21c0_0 .net/s "x", 15 0, L_0xb4d256300;  1 drivers
L_0xb4cdf4780 .extend/s 32, L_0xb4d256300;
L_0xb4cdf4820 .extend/s 32, L_0xb4d2563a0;
L_0xb4cdf48c0 .arith/mult 32, L_0xb4cdf4780, L_0xb4cdf4820;
L_0xb4d2561c0 .part L_0xb4cdf48c0, 31, 1;
L_0xb4d256260 .repeat 8, 8, L_0xb4d2561c0;
L_0xb4cdf4960 .concat [ 32 8 0 0], L_0xb4cdf48c0, L_0xb4d256260;
L_0xb4d251040 .arith/sum 40, L_0xb4c855498, L_0xb4cdf4960;
S_0xb4d22f780 .scope generate, "GEN_MAC[29]" "GEN_MAC[29]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98d40 .param/l "i" 1 6 17, +C4<011101>;
S_0xb4d22f900 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d22f780;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8eac0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8eb00 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8eb40 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdb2260_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf4a00;  1 drivers
v0xb4cdb2300_0 .net/s *"_ivl_2", 31 0, L_0xb4cdf4aa0;  1 drivers
v0xb4cdb23a0_0 .net *"_ivl_7", 0 0, L_0xb4d256440;  1 drivers
v0xb4cdb2440_0 .net *"_ivl_9", 7 0, L_0xb4d2564e0;  1 drivers
L_0xb4c8554e0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb24e0_0 .net/s "acc_in", 39 0, L_0xb4c8554e0;  1 drivers
v0xb4cdb2580_0 .net/s "acc_out", 39 0, L_0xb4d2510e0;  alias, 1 drivers
v0xb4cdb2620_0 .net/s "product", 31 0, L_0xb4cdf4b40;  1 drivers
v0xb4cdb26c0_0 .net/s "product_ext", 39 0, L_0xb4cdf4be0;  1 drivers
v0xb4cdb2760_0 .net/s "w", 15 0, L_0xb4d256620;  1 drivers
v0xb4cdb2800_0 .net/s "x", 15 0, L_0xb4d256580;  1 drivers
L_0xb4cdf4a00 .extend/s 32, L_0xb4d256580;
L_0xb4cdf4aa0 .extend/s 32, L_0xb4d256620;
L_0xb4cdf4b40 .arith/mult 32, L_0xb4cdf4a00, L_0xb4cdf4aa0;
L_0xb4d256440 .part L_0xb4cdf4b40, 31, 1;
L_0xb4d2564e0 .repeat 8, 8, L_0xb4d256440;
L_0xb4cdf4be0 .concat [ 32 8 0 0], L_0xb4cdf4b40, L_0xb4d2564e0;
L_0xb4d2510e0 .arith/sum 40, L_0xb4c8554e0, L_0xb4cdf4be0;
S_0xb4d22fa80 .scope generate, "GEN_MAC[30]" "GEN_MAC[30]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98d80 .param/l "i" 1 6 17, +C4<011110>;
S_0xb4d22fc00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d22fa80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8eb80 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8ebc0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8ec00 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdb28a0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf4c80;  1 drivers
v0xb4cdb2940_0 .net/s *"_ivl_2", 31 0, L_0xb4cdf4d20;  1 drivers
v0xb4cdb29e0_0 .net *"_ivl_7", 0 0, L_0xb4d2566c0;  1 drivers
v0xb4cdb2a80_0 .net *"_ivl_9", 7 0, L_0xb4d256760;  1 drivers
L_0xb4c855528 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb2b20_0 .net/s "acc_in", 39 0, L_0xb4c855528;  1 drivers
v0xb4cdb2bc0_0 .net/s "acc_out", 39 0, L_0xb4d251180;  alias, 1 drivers
v0xb4cdb2c60_0 .net/s "product", 31 0, L_0xb4cdf4dc0;  1 drivers
v0xb4cdb2d00_0 .net/s "product_ext", 39 0, L_0xb4cdf4e60;  1 drivers
v0xb4cdb2da0_0 .net/s "w", 15 0, L_0xb4d2568a0;  1 drivers
v0xb4cdb2e40_0 .net/s "x", 15 0, L_0xb4d256800;  1 drivers
L_0xb4cdf4c80 .extend/s 32, L_0xb4d256800;
L_0xb4cdf4d20 .extend/s 32, L_0xb4d2568a0;
L_0xb4cdf4dc0 .arith/mult 32, L_0xb4cdf4c80, L_0xb4cdf4d20;
L_0xb4d2566c0 .part L_0xb4cdf4dc0, 31, 1;
L_0xb4d256760 .repeat 8, 8, L_0xb4d2566c0;
L_0xb4cdf4e60 .concat [ 32 8 0 0], L_0xb4cdf4dc0, L_0xb4d256760;
L_0xb4d251180 .arith/sum 40, L_0xb4c855528, L_0xb4cdf4e60;
S_0xb4d22fd80 .scope generate, "GEN_MAC[31]" "GEN_MAC[31]" 6 17, 6 17 0, S_0xb4d225e00;
 .timescale 0 0;
P_0xb4cd98dc0 .param/l "i" 1 6 17, +C4<011111>;
S_0xb4d234000 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d22fd80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8ec40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8ec80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8ecc0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdb2ee0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf4f00;  1 drivers
v0xb4cdb2f80_0 .net/s *"_ivl_2", 31 0, L_0xb4cdf4fa0;  1 drivers
v0xb4cdb3020_0 .net *"_ivl_7", 0 0, L_0xb4d256940;  1 drivers
v0xb4cdb30c0_0 .net *"_ivl_9", 7 0, L_0xb4d2569e0;  1 drivers
L_0xb4c855570 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb3160_0 .net/s "acc_in", 39 0, L_0xb4c855570;  1 drivers
v0xb4cdb3200_0 .net/s "acc_out", 39 0, L_0xb4d251220;  alias, 1 drivers
v0xb4cdb32a0_0 .net/s "product", 31 0, L_0xb4cdf5040;  1 drivers
v0xb4cdb3340_0 .net/s "product_ext", 39 0, L_0xb4cdf50e0;  1 drivers
v0xb4cdb33e0_0 .net/s "w", 15 0, L_0xb4d256b20;  1 drivers
v0xb4cdb3480_0 .net/s "x", 15 0, L_0xb4d256a80;  1 drivers
L_0xb4cdf4f00 .extend/s 32, L_0xb4d256a80;
L_0xb4cdf4fa0 .extend/s 32, L_0xb4d256b20;
L_0xb4cdf5040 .arith/mult 32, L_0xb4cdf4f00, L_0xb4cdf4fa0;
L_0xb4d256940 .part L_0xb4cdf5040, 31, 1;
L_0xb4d2569e0 .repeat 8, 8, L_0xb4d256940;
L_0xb4cdf50e0 .concat [ 32 8 0 0], L_0xb4cdf5040, L_0xb4d2569e0;
L_0xb4d251220 .arith/sum 40, L_0xb4c855570, L_0xb4cdf50e0;
S_0xb4d234180 .scope generate, "GEN_NEURON[2]" "GEN_NEURON[2]" 4 35, 4 35 0, S_0x1029f0550;
 .timescale 0 0;
P_0xb4cd98e00 .param/l "n" 1 4 35, +C4<010>;
S_0xb4d234300 .scope module, "u_neuron" "neuron_parallel" 4 43, 5 1 0, S_0xb4d234180;
 .timescale 0 0;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst";
    .port_info 2 /INPUT 1 "start";
    .port_info 3 /INPUT 512 "x_bus";
    .port_info 4 /INPUT 512 "w_bus";
    .port_info 5 /INPUT 16 "bias";
    .port_info 6 /OUTPUT 16 "y";
    .port_info 7 /OUTPUT 1 "busy";
    .port_info 8 /OUTPUT 1 "done";
P_0x1029f62b0 .param/l "ACC_WIDTH" 0 5 6, +C4<00000000000000000000000000101000>;
P_0x1029f62f0 .param/l "DATA_WIDTH" 0 5 2, +C4<00000000000000000000000000010000>;
P_0x1029f6330 .param/l "FRAC_BITS" 0 5 3, +C4<00000000000000000000000000001000>;
P_0x1029f6370 .param/l "GROUPS" 1 5 21, +C4<00000000000000000000000000000001>;
P_0x1029f63b0 .param/l "GROUP_INDEX_WIDTH" 1 5 22, +C4<00000000000000000000000000000001>;
P_0x1029f63f0 .param/l "N_INPUTS" 0 5 4, +C4<00000000000000000000000000100000>;
P_0x1029f6430 .param/l "PARALLEL" 0 5 5, +C4<00000000000000000000000000100000>;
L_0x1029dede0 .functor BUFZ 16, L_0xb4d260460, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v0xb4cdc5d60_0 .net *"_ivl_0", 31 0, L_0xb4cdf5360;  1 drivers
v0xb4cdc5e00_0 .net *"_ivl_11", 31 0, L_0xb4cdf54a0;  1 drivers
v0xb4cdc5ea0_0 .net *"_ivl_14", 31 0, L_0xb4cdf5540;  1 drivers
L_0xb4c8556d8 .functor BUFT 1, C4<0000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdc5f40_0 .net *"_ivl_17", 30 0, L_0xb4c8556d8;  1 drivers
L_0xb4c855720 .functor BUFT 1, C4<00000000000000000000000000100000>, C4<0>, C4<0>, C4<0>;
v0xb4cdc5fe0_0 .net/2u *"_ivl_18", 31 0, L_0xb4c855720;  1 drivers
v0xb4cdc6080_0 .net *"_ivl_21", 31 0, L_0xb4cdf55e0;  1 drivers
L_0xb4c855768 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
v0xb4cdc6120_0 .net/2u *"_ivl_22", 31 0, L_0xb4c855768;  1 drivers
v0xb4cdc61c0_0 .net *"_ivl_25", 31 0, L_0xb4cdf5680;  1 drivers
L_0xb4c855600 .functor BUFT 1, C4<0000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdc6260_0 .net *"_ivl_3", 30 0, L_0xb4c855600;  1 drivers
v0xb4cdc6300_0 .net *"_ivl_31", 0 0, L_0xb4d260140;  1 drivers
v0xb4cdc63a0_0 .net *"_ivl_33", 23 0, L_0xb4d2601e0;  1 drivers
v0xb4cdc6440_0 .net *"_ivl_36", 39 0, L_0xb4cdfe800;  1 drivers
v0xb4cdc64e0_0 .net *"_ivl_38", 31 0, L_0xb4d260280;  1 drivers
L_0xb4c855648 .functor BUFT 1, C4<00000000000000000000000000100000>, C4<0>, C4<0>, C4<0>;
v0xb4cdc6580_0 .net/2u *"_ivl_4", 31 0, L_0xb4c855648;  1 drivers
L_0xb4c8560b0 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdc6620_0 .net *"_ivl_40", 7 0, L_0xb4c8560b0;  1 drivers
v0xb4cdc66c0_0 .net *"_ivl_46", 31 0, L_0xb4d260320;  1 drivers
v0xb4cdc6760_0 .net *"_ivl_7", 31 0, L_0xb4cdf5400;  1 drivers
L_0xb4c855690 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
v0xb4cdc6800_0 .net/2u *"_ivl_8", 31 0, L_0xb4c855690;  1 drivers
v0xb4cdc68a0_0 .var/s "acc", 39 0;
v0xb4cdc6940_0 .net/s "acc_next", 39 0, L_0xb4d252800;  1 drivers
v0xb4cdc69e0_0 .net/s "bias", 15 0, L_0xb4d260460;  1 drivers
v0xb4cdc6a80_0 .net/s "bias_ext", 39 0, L_0xb4cdfe760;  1 drivers
v0xb4cdc6b20_0 .net/s "bias_ext_small", 15 0, L_0x1029dede0;  1 drivers
v0xb4cdc6bc0_0 .var "busy", 0 0;
v0xb4cdc6c60_0 .net "clk", 0 0, v0xb4cde2120_0;  alias, 1 drivers
v0xb4cdc6d00_0 .var "done", 0 0;
v0xb4cdc6da0_0 .net/s "final_acc", 39 0, L_0xb4d2528a0;  1 drivers
v0xb4cdc6e40_0 .net/s "final_value", 39 0, L_0xb4cdfe8a0;  1 drivers
v0xb4cdc6ee0_0 .var "group_index", 0 0;
v0xb4cdc6f80_0 .net "rst", 0 0, v0xb4cde2440_0;  alias, 1 drivers
v0xb4cdc7020_0 .net "start", 0 0, v0xb4cde24e0_0;  alias, 1 drivers
v0xb4cdc70c0_0 .net/s "w_bus", 511 0, L_0xb4d2603c0;  1 drivers
v0xb4cdc7160_0 .net/s "w_group", 511 0, L_0xb4d257020;  1 drivers
v0xb4cdc7200_0 .net/s "x_bus", 511 0, v0xb4cde2620_0;  alias, 1 drivers
v0xb4cdc72a0_0 .net/s "x_group", 511 0, L_0xb4d256f80;  1 drivers
v0xb4cdc7340_0 .var/s "y", 15 0;
L_0xb4cdf5360 .concat [ 1 31 0 0], v0xb4cdc6ee0_0, L_0xb4c855600;
L_0xb4cdf5400 .arith/mult 32, L_0xb4cdf5360, L_0xb4c855648;
L_0xb4cdf54a0 .arith/mult 32, L_0xb4cdf5400, L_0xb4c855690;
L_0xb4d256f80 .part/v v0xb4cde2620_0, L_0xb4cdf54a0, 512;
L_0xb4cdf5540 .concat [ 1 31 0 0], v0xb4cdc6ee0_0, L_0xb4c8556d8;
L_0xb4cdf55e0 .arith/mult 32, L_0xb4cdf5540, L_0xb4c855720;
L_0xb4cdf5680 .arith/mult 32, L_0xb4cdf55e0, L_0xb4c855768;
L_0xb4d257020 .part/v L_0xb4d2603c0, L_0xb4cdf5680, 512;
L_0xb4d260140 .part L_0x1029dede0, 15, 1;
L_0xb4d2601e0 .repeat 24, 24, L_0xb4d260140;
L_0xb4cdfe760 .concat [ 16 24 0 0], L_0x1029dede0, L_0xb4d2601e0;
L_0xb4d260280 .part L_0xb4cdfe760, 0, 32;
L_0xb4cdfe800 .concat [ 8 32 0 0], L_0xb4c8560b0, L_0xb4d260280;
L_0xb4d2528a0 .arith/sum 40, L_0xb4d252800, L_0xb4cdfe800;
L_0xb4d260320 .part L_0xb4d2528a0, 8, 32;
L_0xb4cdfe8a0 .extend/s 40, L_0xb4d260320;
S_0xb4d234480 .scope module, "u_mac8" "mac8" 5 52, 6 1 0, S_0xb4d234300;
 .timescale 0 0;
    .port_info 0 /INPUT 512 "x_bus";
    .port_info 1 /INPUT 512 "w_bus";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8ed00 .param/l "ACC_WIDTH" 0 6 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8ed40 .param/l "DATA_WIDTH" 0 6 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8ed80 .param/l "PARALLEL" 0 6 4, +C4<00000000000000000000000000100000>;
v0xb4cdc5900_0 .net/s "acc_in", 39 0, v0xb4cdc68a0_0;  1 drivers
v0xb4cdc59a0_0 .net/s "acc_out", 39 0, L_0xb4d252800;  alias, 1 drivers
v0xb4cdc5a40_0 .var/i "j", 31 0;
v0xb4cdc5ae0 .array "products", 31 0;
v0xb4cdc5ae0_0 .net/s v0xb4cdc5ae0 0, 39 0, L_0xb4d251400; 1 drivers
v0xb4cdc5ae0_1 .net/s v0xb4cdc5ae0 1, 39 0, L_0xb4d2514a0; 1 drivers
v0xb4cdc5ae0_2 .net/s v0xb4cdc5ae0 2, 39 0, L_0xb4d251540; 1 drivers
v0xb4cdc5ae0_3 .net/s v0xb4cdc5ae0 3, 39 0, L_0xb4d2515e0; 1 drivers
v0xb4cdc5ae0_4 .net/s v0xb4cdc5ae0 4, 39 0, L_0xb4d251680; 1 drivers
v0xb4cdc5ae0_5 .net/s v0xb4cdc5ae0 5, 39 0, L_0xb4d251720; 1 drivers
v0xb4cdc5ae0_6 .net/s v0xb4cdc5ae0 6, 39 0, L_0xb4d2517c0; 1 drivers
v0xb4cdc5ae0_7 .net/s v0xb4cdc5ae0 7, 39 0, L_0xb4d251860; 1 drivers
v0xb4cdc5ae0_8 .net/s v0xb4cdc5ae0 8, 39 0, L_0xb4d251900; 1 drivers
v0xb4cdc5ae0_9 .net/s v0xb4cdc5ae0 9, 39 0, L_0xb4d2519a0; 1 drivers
v0xb4cdc5ae0_10 .net/s v0xb4cdc5ae0 10, 39 0, L_0xb4d251a40; 1 drivers
v0xb4cdc5ae0_11 .net/s v0xb4cdc5ae0 11, 39 0, L_0xb4d251ae0; 1 drivers
v0xb4cdc5ae0_12 .net/s v0xb4cdc5ae0 12, 39 0, L_0xb4d251b80; 1 drivers
v0xb4cdc5ae0_13 .net/s v0xb4cdc5ae0 13, 39 0, L_0xb4d251c20; 1 drivers
v0xb4cdc5ae0_14 .net/s v0xb4cdc5ae0 14, 39 0, L_0xb4d251cc0; 1 drivers
v0xb4cdc5ae0_15 .net/s v0xb4cdc5ae0 15, 39 0, L_0xb4d251d60; 1 drivers
v0xb4cdc5ae0_16 .net/s v0xb4cdc5ae0 16, 39 0, L_0xb4d251e00; 1 drivers
v0xb4cdc5ae0_17 .net/s v0xb4cdc5ae0 17, 39 0, L_0xb4d251ea0; 1 drivers
v0xb4cdc5ae0_18 .net/s v0xb4cdc5ae0 18, 39 0, L_0xb4d251f40; 1 drivers
v0xb4cdc5ae0_19 .net/s v0xb4cdc5ae0 19, 39 0, L_0xb4d251fe0; 1 drivers
v0xb4cdc5ae0_20 .net/s v0xb4cdc5ae0 20, 39 0, L_0xb4d252080; 1 drivers
v0xb4cdc5ae0_21 .net/s v0xb4cdc5ae0 21, 39 0, L_0xb4d252120; 1 drivers
v0xb4cdc5ae0_22 .net/s v0xb4cdc5ae0 22, 39 0, L_0xb4d2521c0; 1 drivers
v0xb4cdc5ae0_23 .net/s v0xb4cdc5ae0 23, 39 0, L_0xb4d252260; 1 drivers
v0xb4cdc5ae0_24 .net/s v0xb4cdc5ae0 24, 39 0, L_0xb4d252300; 1 drivers
v0xb4cdc5ae0_25 .net/s v0xb4cdc5ae0 25, 39 0, L_0xb4d2523a0; 1 drivers
v0xb4cdc5ae0_26 .net/s v0xb4cdc5ae0 26, 39 0, L_0xb4d252440; 1 drivers
v0xb4cdc5ae0_27 .net/s v0xb4cdc5ae0 27, 39 0, L_0xb4d2524e0; 1 drivers
v0xb4cdc5ae0_28 .net/s v0xb4cdc5ae0 28, 39 0, L_0xb4d252580; 1 drivers
v0xb4cdc5ae0_29 .net/s v0xb4cdc5ae0 29, 39 0, L_0xb4d252620; 1 drivers
v0xb4cdc5ae0_30 .net/s v0xb4cdc5ae0 30, 39 0, L_0xb4d2526c0; 1 drivers
v0xb4cdc5ae0_31 .net/s v0xb4cdc5ae0 31, 39 0, L_0xb4d252760; 1 drivers
v0xb4cdc5b80_0 .var/s "sum", 39 0;
v0xb4cdc5c20_0 .net/s "w_bus", 511 0, L_0xb4d257020;  alias, 1 drivers
v0xb4cdc5cc0_0 .net/s "x_bus", 511 0, L_0xb4d256f80;  alias, 1 drivers
E_0xb4d20df40/0 .event anyedge, v0xb4cdc5b80_0, v0xb4cdb5360_0, v0xb4cdb59a0_0, v0xb4cdb5fe0_0;
E_0xb4d20df40/1 .event anyedge, v0xb4cdb6620_0, v0xb4cdb6c60_0, v0xb4cdb72a0_0, v0xb4cdb78e0_0;
E_0xb4d20df40/2 .event anyedge, v0xb4cdb7f20_0, v0xb4cdb85a0_0, v0xb4cdb8be0_0, v0xb4cdb9220_0;
E_0xb4d20df40/3 .event anyedge, v0xb4cdb9860_0, v0xb4cdb9ea0_0, v0xb4cdba4e0_0, v0xb4cdbab20_0;
E_0xb4d20df40/4 .event anyedge, v0xb4cdbb160_0, v0xb4cdbb7a0_0, v0xb4cdbbde0_0, v0xb4cdbc460_0;
E_0xb4d20df40/5 .event anyedge, v0xb4cdbcaa0_0, v0xb4cdbd0e0_0, v0xb4cdbd720_0, v0xb4cdbdd60_0;
E_0xb4d20df40/6 .event anyedge, v0xb4cdbe3a0_0, v0xb4cdbe9e0_0, v0xb4cdbf020_0, v0xb4cdbf660_0;
E_0xb4d20df40/7 .event anyedge, v0xb4cdbfca0_0, v0xb4cdc4320_0, v0xb4cdc4960_0, v0xb4cdc4fa0_0;
E_0xb4d20df40/8 .event anyedge, v0xb4cdc55e0_0;
E_0xb4d20df40 .event/or E_0xb4d20df40/0, E_0xb4d20df40/1, E_0xb4d20df40/2, E_0xb4d20df40/3, E_0xb4d20df40/4, E_0xb4d20df40/5, E_0xb4d20df40/6, E_0xb4d20df40/7, E_0xb4d20df40/8;
L_0xb4d257200 .part L_0xb4d256f80, 0, 16;
L_0xb4d2572a0 .part L_0xb4d257020, 0, 16;
L_0xb4d257480 .part L_0xb4d256f80, 16, 16;
L_0xb4d257520 .part L_0xb4d257020, 16, 16;
L_0xb4d257700 .part L_0xb4d256f80, 32, 16;
L_0xb4d2577a0 .part L_0xb4d257020, 32, 16;
L_0xb4d257980 .part L_0xb4d256f80, 48, 16;
L_0xb4d257a20 .part L_0xb4d257020, 48, 16;
L_0xb4d257c00 .part L_0xb4d256f80, 64, 16;
L_0xb4d257ca0 .part L_0xb4d257020, 64, 16;
L_0xb4d257e80 .part L_0xb4d256f80, 80, 16;
L_0xb4d257f20 .part L_0xb4d257020, 80, 16;
L_0xb4d258140 .part L_0xb4d256f80, 96, 16;
L_0xb4d2581e0 .part L_0xb4d257020, 96, 16;
L_0xb4d2583c0 .part L_0xb4d256f80, 112, 16;
L_0xb4d258460 .part L_0xb4d257020, 112, 16;
L_0xb4d258640 .part L_0xb4d256f80, 128, 16;
L_0xb4d258780 .part L_0xb4d257020, 128, 16;
L_0xb4d258960 .part L_0xb4d256f80, 144, 16;
L_0xb4d258a00 .part L_0xb4d257020, 144, 16;
L_0xb4d258be0 .part L_0xb4d256f80, 160, 16;
L_0xb4d2586e0 .part L_0xb4d257020, 160, 16;
L_0xb4d258dc0 .part L_0xb4d256f80, 176, 16;
L_0xb4d258e60 .part L_0xb4d257020, 176, 16;
L_0xb4d259040 .part L_0xb4d256f80, 192, 16;
L_0xb4d2590e0 .part L_0xb4d257020, 192, 16;
L_0xb4d2592c0 .part L_0xb4d256f80, 208, 16;
L_0xb4d259360 .part L_0xb4d257020, 208, 16;
L_0xb4d259540 .part L_0xb4d256f80, 224, 16;
L_0xb4d2595e0 .part L_0xb4d257020, 224, 16;
L_0xb4d2597c0 .part L_0xb4d256f80, 240, 16;
L_0xb4d259860 .part L_0xb4d257020, 240, 16;
L_0xb4d259a40 .part L_0xb4d256f80, 256, 16;
L_0xb4d259ae0 .part L_0xb4d257020, 256, 16;
L_0xb4d259cc0 .part L_0xb4d256f80, 272, 16;
L_0xb4d259d60 .part L_0xb4d257020, 272, 16;
L_0xb4d259f40 .part L_0xb4d256f80, 288, 16;
L_0xb4d259fe0 .part L_0xb4d257020, 288, 16;
L_0xb4d25a1c0 .part L_0xb4d256f80, 304, 16;
L_0xb4d25a260 .part L_0xb4d257020, 304, 16;
L_0xb4d25a440 .part L_0xb4d256f80, 320, 16;
L_0xb4d25a4e0 .part L_0xb4d257020, 320, 16;
L_0xb4d25a6c0 .part L_0xb4d256f80, 336, 16;
L_0xb4d25a760 .part L_0xb4d257020, 336, 16;
L_0xb4d25a940 .part L_0xb4d256f80, 352, 16;
L_0xb4d25a9e0 .part L_0xb4d257020, 352, 16;
L_0xb4d25abc0 .part L_0xb4d256f80, 368, 16;
L_0xb4d25ac60 .part L_0xb4d257020, 368, 16;
L_0xb4d25ae40 .part L_0xb4d256f80, 384, 16;
L_0xb4d25aee0 .part L_0xb4d257020, 384, 16;
L_0xb4d25b0c0 .part L_0xb4d256f80, 400, 16;
L_0xb4d25b160 .part L_0xb4d257020, 400, 16;
L_0xb4d25b340 .part L_0xb4d256f80, 416, 16;
L_0xb4d25b3e0 .part L_0xb4d257020, 416, 16;
L_0xb4d25b5c0 .part L_0xb4d256f80, 432, 16;
L_0xb4d25b660 .part L_0xb4d257020, 432, 16;
L_0xb4d25b840 .part L_0xb4d256f80, 448, 16;
L_0xb4d25b8e0 .part L_0xb4d257020, 448, 16;
L_0xb4d25bac0 .part L_0xb4d256f80, 464, 16;
L_0xb4d25bb60 .part L_0xb4d257020, 464, 16;
L_0xb4d25bd40 .part L_0xb4d256f80, 480, 16;
L_0xb4d25bde0 .part L_0xb4d257020, 480, 16;
L_0xb4d260000 .part L_0xb4d256f80, 496, 16;
L_0xb4d2600a0 .part L_0xb4d257020, 496, 16;
L_0xb4d252800 .arith/sum 40, v0xb4cdc68a0_0, v0xb4cdc5b80_0;
S_0xb4d234600 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd98e40 .param/l "i" 1 6 17, +C4<00>;
S_0xb4d234780 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d234600;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8edc0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8ee00 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8ee40 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdb5040_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf5720;  1 drivers
v0xb4cdb50e0_0 .net/s *"_ivl_2", 31 0, L_0xb4cdf57c0;  1 drivers
v0xb4cdb5180_0 .net *"_ivl_7", 0 0, L_0xb4d2570c0;  1 drivers
v0xb4cdb5220_0 .net *"_ivl_9", 7 0, L_0xb4d257160;  1 drivers
L_0xb4c8557b0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb52c0_0 .net/s "acc_in", 39 0, L_0xb4c8557b0;  1 drivers
v0xb4cdb5360_0 .net/s "acc_out", 39 0, L_0xb4d251400;  alias, 1 drivers
v0xb4cdb5400_0 .net/s "product", 31 0, L_0xb4cdf5860;  1 drivers
v0xb4cdb54a0_0 .net/s "product_ext", 39 0, L_0xb4cdf5900;  1 drivers
v0xb4cdb5540_0 .net/s "w", 15 0, L_0xb4d2572a0;  1 drivers
v0xb4cdb55e0_0 .net/s "x", 15 0, L_0xb4d257200;  1 drivers
L_0xb4cdf5720 .extend/s 32, L_0xb4d257200;
L_0xb4cdf57c0 .extend/s 32, L_0xb4d2572a0;
L_0xb4cdf5860 .arith/mult 32, L_0xb4cdf5720, L_0xb4cdf57c0;
L_0xb4d2570c0 .part L_0xb4cdf5860, 31, 1;
L_0xb4d257160 .repeat 8, 8, L_0xb4d2570c0;
L_0xb4cdf5900 .concat [ 32 8 0 0], L_0xb4cdf5860, L_0xb4d257160;
L_0xb4d251400 .arith/sum 40, L_0xb4c8557b0, L_0xb4cdf5900;
S_0xb4d234900 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd98e80 .param/l "i" 1 6 17, +C4<01>;
S_0xb4d234a80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d234900;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8ee80 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8eec0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8ef00 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdb5680_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf59a0;  1 drivers
v0xb4cdb5720_0 .net/s *"_ivl_2", 31 0, L_0xb4cdf5a40;  1 drivers
v0xb4cdb57c0_0 .net *"_ivl_7", 0 0, L_0xb4d257340;  1 drivers
v0xb4cdb5860_0 .net *"_ivl_9", 7 0, L_0xb4d2573e0;  1 drivers
L_0xb4c8557f8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb5900_0 .net/s "acc_in", 39 0, L_0xb4c8557f8;  1 drivers
v0xb4cdb59a0_0 .net/s "acc_out", 39 0, L_0xb4d2514a0;  alias, 1 drivers
v0xb4cdb5a40_0 .net/s "product", 31 0, L_0xb4cdf5ae0;  1 drivers
v0xb4cdb5ae0_0 .net/s "product_ext", 39 0, L_0xb4cdf5b80;  1 drivers
v0xb4cdb5b80_0 .net/s "w", 15 0, L_0xb4d257520;  1 drivers
v0xb4cdb5c20_0 .net/s "x", 15 0, L_0xb4d257480;  1 drivers
L_0xb4cdf59a0 .extend/s 32, L_0xb4d257480;
L_0xb4cdf5a40 .extend/s 32, L_0xb4d257520;
L_0xb4cdf5ae0 .arith/mult 32, L_0xb4cdf59a0, L_0xb4cdf5a40;
L_0xb4d257340 .part L_0xb4cdf5ae0, 31, 1;
L_0xb4d2573e0 .repeat 8, 8, L_0xb4d257340;
L_0xb4cdf5b80 .concat [ 32 8 0 0], L_0xb4cdf5ae0, L_0xb4d2573e0;
L_0xb4d2514a0 .arith/sum 40, L_0xb4c8557f8, L_0xb4cdf5b80;
S_0xb4d234c00 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd98ec0 .param/l "i" 1 6 17, +C4<010>;
S_0xb4d234d80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d234c00;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8ef40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8ef80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8efc0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdb5cc0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf5c20;  1 drivers
v0xb4cdb5d60_0 .net/s *"_ivl_2", 31 0, L_0xb4cdf5cc0;  1 drivers
v0xb4cdb5e00_0 .net *"_ivl_7", 0 0, L_0xb4d2575c0;  1 drivers
v0xb4cdb5ea0_0 .net *"_ivl_9", 7 0, L_0xb4d257660;  1 drivers
L_0xb4c855840 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb5f40_0 .net/s "acc_in", 39 0, L_0xb4c855840;  1 drivers
v0xb4cdb5fe0_0 .net/s "acc_out", 39 0, L_0xb4d251540;  alias, 1 drivers
v0xb4cdb6080_0 .net/s "product", 31 0, L_0xb4cdf5d60;  1 drivers
v0xb4cdb6120_0 .net/s "product_ext", 39 0, L_0xb4cdf5e00;  1 drivers
v0xb4cdb61c0_0 .net/s "w", 15 0, L_0xb4d2577a0;  1 drivers
v0xb4cdb6260_0 .net/s "x", 15 0, L_0xb4d257700;  1 drivers
L_0xb4cdf5c20 .extend/s 32, L_0xb4d257700;
L_0xb4cdf5cc0 .extend/s 32, L_0xb4d2577a0;
L_0xb4cdf5d60 .arith/mult 32, L_0xb4cdf5c20, L_0xb4cdf5cc0;
L_0xb4d2575c0 .part L_0xb4cdf5d60, 31, 1;
L_0xb4d257660 .repeat 8, 8, L_0xb4d2575c0;
L_0xb4cdf5e00 .concat [ 32 8 0 0], L_0xb4cdf5d60, L_0xb4d257660;
L_0xb4d251540 .arith/sum 40, L_0xb4c855840, L_0xb4cdf5e00;
S_0xb4d234f00 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd98f00 .param/l "i" 1 6 17, +C4<011>;
S_0xb4d235080 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d234f00;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8f000 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8f040 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8f080 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdb6300_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf5ea0;  1 drivers
v0xb4cdb63a0_0 .net/s *"_ivl_2", 31 0, L_0xb4cdf5f40;  1 drivers
v0xb4cdb6440_0 .net *"_ivl_7", 0 0, L_0xb4d257840;  1 drivers
v0xb4cdb64e0_0 .net *"_ivl_9", 7 0, L_0xb4d2578e0;  1 drivers
L_0xb4c855888 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb6580_0 .net/s "acc_in", 39 0, L_0xb4c855888;  1 drivers
v0xb4cdb6620_0 .net/s "acc_out", 39 0, L_0xb4d2515e0;  alias, 1 drivers
v0xb4cdb66c0_0 .net/s "product", 31 0, L_0xb4cdf5fe0;  1 drivers
v0xb4cdb6760_0 .net/s "product_ext", 39 0, L_0xb4cdf6080;  1 drivers
v0xb4cdb6800_0 .net/s "w", 15 0, L_0xb4d257a20;  1 drivers
v0xb4cdb68a0_0 .net/s "x", 15 0, L_0xb4d257980;  1 drivers
L_0xb4cdf5ea0 .extend/s 32, L_0xb4d257980;
L_0xb4cdf5f40 .extend/s 32, L_0xb4d257a20;
L_0xb4cdf5fe0 .arith/mult 32, L_0xb4cdf5ea0, L_0xb4cdf5f40;
L_0xb4d257840 .part L_0xb4cdf5fe0, 31, 1;
L_0xb4d2578e0 .repeat 8, 8, L_0xb4d257840;
L_0xb4cdf6080 .concat [ 32 8 0 0], L_0xb4cdf5fe0, L_0xb4d2578e0;
L_0xb4d2515e0 .arith/sum 40, L_0xb4c855888, L_0xb4cdf6080;
S_0xb4d235200 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd98f40 .param/l "i" 1 6 17, +C4<0100>;
S_0xb4d235380 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d235200;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8f0c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8f100 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8f140 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdb6940_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf6120;  1 drivers
v0xb4cdb69e0_0 .net/s *"_ivl_2", 31 0, L_0xb4cdf61c0;  1 drivers
v0xb4cdb6a80_0 .net *"_ivl_7", 0 0, L_0xb4d257ac0;  1 drivers
v0xb4cdb6b20_0 .net *"_ivl_9", 7 0, L_0xb4d257b60;  1 drivers
L_0xb4c8558d0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb6bc0_0 .net/s "acc_in", 39 0, L_0xb4c8558d0;  1 drivers
v0xb4cdb6c60_0 .net/s "acc_out", 39 0, L_0xb4d251680;  alias, 1 drivers
v0xb4cdb6d00_0 .net/s "product", 31 0, L_0xb4cdf6260;  1 drivers
v0xb4cdb6da0_0 .net/s "product_ext", 39 0, L_0xb4cdf6300;  1 drivers
v0xb4cdb6e40_0 .net/s "w", 15 0, L_0xb4d257ca0;  1 drivers
v0xb4cdb6ee0_0 .net/s "x", 15 0, L_0xb4d257c00;  1 drivers
L_0xb4cdf6120 .extend/s 32, L_0xb4d257c00;
L_0xb4cdf61c0 .extend/s 32, L_0xb4d257ca0;
L_0xb4cdf6260 .arith/mult 32, L_0xb4cdf6120, L_0xb4cdf61c0;
L_0xb4d257ac0 .part L_0xb4cdf6260, 31, 1;
L_0xb4d257b60 .repeat 8, 8, L_0xb4d257ac0;
L_0xb4cdf6300 .concat [ 32 8 0 0], L_0xb4cdf6260, L_0xb4d257b60;
L_0xb4d251680 .arith/sum 40, L_0xb4c8558d0, L_0xb4cdf6300;
S_0xb4d235500 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd98f80 .param/l "i" 1 6 17, +C4<0101>;
S_0xb4d235680 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d235500;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8f180 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8f1c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8f200 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdb6f80_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf63a0;  1 drivers
v0xb4cdb7020_0 .net/s *"_ivl_2", 31 0, L_0xb4cdf6440;  1 drivers
v0xb4cdb70c0_0 .net *"_ivl_7", 0 0, L_0xb4d257d40;  1 drivers
v0xb4cdb7160_0 .net *"_ivl_9", 7 0, L_0xb4d257de0;  1 drivers
L_0xb4c855918 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb7200_0 .net/s "acc_in", 39 0, L_0xb4c855918;  1 drivers
v0xb4cdb72a0_0 .net/s "acc_out", 39 0, L_0xb4d251720;  alias, 1 drivers
v0xb4cdb7340_0 .net/s "product", 31 0, L_0xb4cdf64e0;  1 drivers
v0xb4cdb73e0_0 .net/s "product_ext", 39 0, L_0xb4cdf6580;  1 drivers
v0xb4cdb7480_0 .net/s "w", 15 0, L_0xb4d257f20;  1 drivers
v0xb4cdb7520_0 .net/s "x", 15 0, L_0xb4d257e80;  1 drivers
L_0xb4cdf63a0 .extend/s 32, L_0xb4d257e80;
L_0xb4cdf6440 .extend/s 32, L_0xb4d257f20;
L_0xb4cdf64e0 .arith/mult 32, L_0xb4cdf63a0, L_0xb4cdf6440;
L_0xb4d257d40 .part L_0xb4cdf64e0, 31, 1;
L_0xb4d257de0 .repeat 8, 8, L_0xb4d257d40;
L_0xb4cdf6580 .concat [ 32 8 0 0], L_0xb4cdf64e0, L_0xb4d257de0;
L_0xb4d251720 .arith/sum 40, L_0xb4c855918, L_0xb4cdf6580;
S_0xb4d235800 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd98fc0 .param/l "i" 1 6 17, +C4<0110>;
S_0xb4d235980 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d235800;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8f240 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8f280 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8f2c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdb75c0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf6620;  1 drivers
v0xb4cdb7660_0 .net/s *"_ivl_2", 31 0, L_0xb4cdf66c0;  1 drivers
v0xb4cdb7700_0 .net *"_ivl_7", 0 0, L_0xb4d258000;  1 drivers
v0xb4cdb77a0_0 .net *"_ivl_9", 7 0, L_0xb4d2580a0;  1 drivers
L_0xb4c855960 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb7840_0 .net/s "acc_in", 39 0, L_0xb4c855960;  1 drivers
v0xb4cdb78e0_0 .net/s "acc_out", 39 0, L_0xb4d2517c0;  alias, 1 drivers
v0xb4cdb7980_0 .net/s "product", 31 0, L_0xb4cdf6760;  1 drivers
v0xb4cdb7a20_0 .net/s "product_ext", 39 0, L_0xb4cdf6800;  1 drivers
v0xb4cdb7ac0_0 .net/s "w", 15 0, L_0xb4d2581e0;  1 drivers
v0xb4cdb7b60_0 .net/s "x", 15 0, L_0xb4d258140;  1 drivers
L_0xb4cdf6620 .extend/s 32, L_0xb4d258140;
L_0xb4cdf66c0 .extend/s 32, L_0xb4d2581e0;
L_0xb4cdf6760 .arith/mult 32, L_0xb4cdf6620, L_0xb4cdf66c0;
L_0xb4d258000 .part L_0xb4cdf6760, 31, 1;
L_0xb4d2580a0 .repeat 8, 8, L_0xb4d258000;
L_0xb4cdf6800 .concat [ 32 8 0 0], L_0xb4cdf6760, L_0xb4d2580a0;
L_0xb4d2517c0 .arith/sum 40, L_0xb4c855960, L_0xb4cdf6800;
S_0xb4d235b00 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd99000 .param/l "i" 1 6 17, +C4<0111>;
S_0xb4d235c80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d235b00;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8f300 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8f340 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8f380 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdb7c00_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf68a0;  1 drivers
v0xb4cdb7ca0_0 .net/s *"_ivl_2", 31 0, L_0xb4cdf6940;  1 drivers
v0xb4cdb7d40_0 .net *"_ivl_7", 0 0, L_0xb4d258280;  1 drivers
v0xb4cdb7de0_0 .net *"_ivl_9", 7 0, L_0xb4d258320;  1 drivers
L_0xb4c8559a8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb7e80_0 .net/s "acc_in", 39 0, L_0xb4c8559a8;  1 drivers
v0xb4cdb7f20_0 .net/s "acc_out", 39 0, L_0xb4d251860;  alias, 1 drivers
v0xb4cdb8000_0 .net/s "product", 31 0, L_0xb4cdf69e0;  1 drivers
v0xb4cdb80a0_0 .net/s "product_ext", 39 0, L_0xb4cdf6a80;  1 drivers
v0xb4cdb8140_0 .net/s "w", 15 0, L_0xb4d258460;  1 drivers
v0xb4cdb81e0_0 .net/s "x", 15 0, L_0xb4d2583c0;  1 drivers
L_0xb4cdf68a0 .extend/s 32, L_0xb4d2583c0;
L_0xb4cdf6940 .extend/s 32, L_0xb4d258460;
L_0xb4cdf69e0 .arith/mult 32, L_0xb4cdf68a0, L_0xb4cdf6940;
L_0xb4d258280 .part L_0xb4cdf69e0, 31, 1;
L_0xb4d258320 .repeat 8, 8, L_0xb4d258280;
L_0xb4cdf6a80 .concat [ 32 8 0 0], L_0xb4cdf69e0, L_0xb4d258320;
L_0xb4d251860 .arith/sum 40, L_0xb4c8559a8, L_0xb4cdf6a80;
S_0xb4d235e00 .scope generate, "GEN_MAC[8]" "GEN_MAC[8]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd99040 .param/l "i" 1 6 17, +C4<01000>;
S_0xb4d235f80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d235e00;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8f3c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8f400 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8f440 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdb8280_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf6b20;  1 drivers
v0xb4cdb8320_0 .net/s *"_ivl_2", 31 0, L_0xb4cdf6bc0;  1 drivers
v0xb4cdb83c0_0 .net *"_ivl_7", 0 0, L_0xb4d258500;  1 drivers
v0xb4cdb8460_0 .net *"_ivl_9", 7 0, L_0xb4d2585a0;  1 drivers
L_0xb4c8559f0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb8500_0 .net/s "acc_in", 39 0, L_0xb4c8559f0;  1 drivers
v0xb4cdb85a0_0 .net/s "acc_out", 39 0, L_0xb4d251900;  alias, 1 drivers
v0xb4cdb8640_0 .net/s "product", 31 0, L_0xb4cdf6c60;  1 drivers
v0xb4cdb86e0_0 .net/s "product_ext", 39 0, L_0xb4cdf6d00;  1 drivers
v0xb4cdb8780_0 .net/s "w", 15 0, L_0xb4d258780;  1 drivers
v0xb4cdb8820_0 .net/s "x", 15 0, L_0xb4d258640;  1 drivers
L_0xb4cdf6b20 .extend/s 32, L_0xb4d258640;
L_0xb4cdf6bc0 .extend/s 32, L_0xb4d258780;
L_0xb4cdf6c60 .arith/mult 32, L_0xb4cdf6b20, L_0xb4cdf6bc0;
L_0xb4d258500 .part L_0xb4cdf6c60, 31, 1;
L_0xb4d2585a0 .repeat 8, 8, L_0xb4d258500;
L_0xb4cdf6d00 .concat [ 32 8 0 0], L_0xb4cdf6c60, L_0xb4d2585a0;
L_0xb4d251900 .arith/sum 40, L_0xb4c8559f0, L_0xb4cdf6d00;
S_0xb4d236100 .scope generate, "GEN_MAC[9]" "GEN_MAC[9]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd99080 .param/l "i" 1 6 17, +C4<01001>;
S_0xb4d236280 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d236100;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8f480 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8f4c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8f500 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdb88c0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf6da0;  1 drivers
v0xb4cdb8960_0 .net/s *"_ivl_2", 31 0, L_0xb4cdf6e40;  1 drivers
v0xb4cdb8a00_0 .net *"_ivl_7", 0 0, L_0xb4d258820;  1 drivers
v0xb4cdb8aa0_0 .net *"_ivl_9", 7 0, L_0xb4d2588c0;  1 drivers
L_0xb4c855a38 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb8b40_0 .net/s "acc_in", 39 0, L_0xb4c855a38;  1 drivers
v0xb4cdb8be0_0 .net/s "acc_out", 39 0, L_0xb4d2519a0;  alias, 1 drivers
v0xb4cdb8c80_0 .net/s "product", 31 0, L_0xb4cdf6ee0;  1 drivers
v0xb4cdb8d20_0 .net/s "product_ext", 39 0, L_0xb4cdf6f80;  1 drivers
v0xb4cdb8dc0_0 .net/s "w", 15 0, L_0xb4d258a00;  1 drivers
v0xb4cdb8e60_0 .net/s "x", 15 0, L_0xb4d258960;  1 drivers
L_0xb4cdf6da0 .extend/s 32, L_0xb4d258960;
L_0xb4cdf6e40 .extend/s 32, L_0xb4d258a00;
L_0xb4cdf6ee0 .arith/mult 32, L_0xb4cdf6da0, L_0xb4cdf6e40;
L_0xb4d258820 .part L_0xb4cdf6ee0, 31, 1;
L_0xb4d2588c0 .repeat 8, 8, L_0xb4d258820;
L_0xb4cdf6f80 .concat [ 32 8 0 0], L_0xb4cdf6ee0, L_0xb4d2588c0;
L_0xb4d2519a0 .arith/sum 40, L_0xb4c855a38, L_0xb4cdf6f80;
S_0xb4d236400 .scope generate, "GEN_MAC[10]" "GEN_MAC[10]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd990c0 .param/l "i" 1 6 17, +C4<01010>;
S_0xb4d236580 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d236400;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8f540 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8f580 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8f5c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdb8f00_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf7020;  1 drivers
v0xb4cdb8fa0_0 .net/s *"_ivl_2", 31 0, L_0xb4cdf70c0;  1 drivers
v0xb4cdb9040_0 .net *"_ivl_7", 0 0, L_0xb4d258aa0;  1 drivers
v0xb4cdb90e0_0 .net *"_ivl_9", 7 0, L_0xb4d258b40;  1 drivers
L_0xb4c855a80 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb9180_0 .net/s "acc_in", 39 0, L_0xb4c855a80;  1 drivers
v0xb4cdb9220_0 .net/s "acc_out", 39 0, L_0xb4d251a40;  alias, 1 drivers
v0xb4cdb92c0_0 .net/s "product", 31 0, L_0xb4cdf7160;  1 drivers
v0xb4cdb9360_0 .net/s "product_ext", 39 0, L_0xb4cdf7200;  1 drivers
v0xb4cdb9400_0 .net/s "w", 15 0, L_0xb4d2586e0;  1 drivers
v0xb4cdb94a0_0 .net/s "x", 15 0, L_0xb4d258be0;  1 drivers
L_0xb4cdf7020 .extend/s 32, L_0xb4d258be0;
L_0xb4cdf70c0 .extend/s 32, L_0xb4d2586e0;
L_0xb4cdf7160 .arith/mult 32, L_0xb4cdf7020, L_0xb4cdf70c0;
L_0xb4d258aa0 .part L_0xb4cdf7160, 31, 1;
L_0xb4d258b40 .repeat 8, 8, L_0xb4d258aa0;
L_0xb4cdf7200 .concat [ 32 8 0 0], L_0xb4cdf7160, L_0xb4d258b40;
L_0xb4d251a40 .arith/sum 40, L_0xb4c855a80, L_0xb4cdf7200;
S_0xb4d236700 .scope generate, "GEN_MAC[11]" "GEN_MAC[11]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd99100 .param/l "i" 1 6 17, +C4<01011>;
S_0xb4d236880 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d236700;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8f600 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8f640 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8f680 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdb9540_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf72a0;  1 drivers
v0xb4cdb95e0_0 .net/s *"_ivl_2", 31 0, L_0xb4cdf7340;  1 drivers
v0xb4cdb9680_0 .net *"_ivl_7", 0 0, L_0xb4d258c80;  1 drivers
v0xb4cdb9720_0 .net *"_ivl_9", 7 0, L_0xb4d258d20;  1 drivers
L_0xb4c855ac8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb97c0_0 .net/s "acc_in", 39 0, L_0xb4c855ac8;  1 drivers
v0xb4cdb9860_0 .net/s "acc_out", 39 0, L_0xb4d251ae0;  alias, 1 drivers
v0xb4cdb9900_0 .net/s "product", 31 0, L_0xb4cdf73e0;  1 drivers
v0xb4cdb99a0_0 .net/s "product_ext", 39 0, L_0xb4cdf7480;  1 drivers
v0xb4cdb9a40_0 .net/s "w", 15 0, L_0xb4d258e60;  1 drivers
v0xb4cdb9ae0_0 .net/s "x", 15 0, L_0xb4d258dc0;  1 drivers
L_0xb4cdf72a0 .extend/s 32, L_0xb4d258dc0;
L_0xb4cdf7340 .extend/s 32, L_0xb4d258e60;
L_0xb4cdf73e0 .arith/mult 32, L_0xb4cdf72a0, L_0xb4cdf7340;
L_0xb4d258c80 .part L_0xb4cdf73e0, 31, 1;
L_0xb4d258d20 .repeat 8, 8, L_0xb4d258c80;
L_0xb4cdf7480 .concat [ 32 8 0 0], L_0xb4cdf73e0, L_0xb4d258d20;
L_0xb4d251ae0 .arith/sum 40, L_0xb4c855ac8, L_0xb4cdf7480;
S_0xb4d236a00 .scope generate, "GEN_MAC[12]" "GEN_MAC[12]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd99140 .param/l "i" 1 6 17, +C4<01100>;
S_0xb4d236b80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d236a00;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8f6c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8f700 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8f740 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdb9b80_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf7520;  1 drivers
v0xb4cdb9c20_0 .net/s *"_ivl_2", 31 0, L_0xb4cdf75c0;  1 drivers
v0xb4cdb9cc0_0 .net *"_ivl_7", 0 0, L_0xb4d258f00;  1 drivers
v0xb4cdb9d60_0 .net *"_ivl_9", 7 0, L_0xb4d258fa0;  1 drivers
L_0xb4c855b10 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdb9e00_0 .net/s "acc_in", 39 0, L_0xb4c855b10;  1 drivers
v0xb4cdb9ea0_0 .net/s "acc_out", 39 0, L_0xb4d251b80;  alias, 1 drivers
v0xb4cdb9f40_0 .net/s "product", 31 0, L_0xb4cdf7660;  1 drivers
v0xb4cdb9fe0_0 .net/s "product_ext", 39 0, L_0xb4cdf7700;  1 drivers
v0xb4cdba080_0 .net/s "w", 15 0, L_0xb4d2590e0;  1 drivers
v0xb4cdba120_0 .net/s "x", 15 0, L_0xb4d259040;  1 drivers
L_0xb4cdf7520 .extend/s 32, L_0xb4d259040;
L_0xb4cdf75c0 .extend/s 32, L_0xb4d2590e0;
L_0xb4cdf7660 .arith/mult 32, L_0xb4cdf7520, L_0xb4cdf75c0;
L_0xb4d258f00 .part L_0xb4cdf7660, 31, 1;
L_0xb4d258fa0 .repeat 8, 8, L_0xb4d258f00;
L_0xb4cdf7700 .concat [ 32 8 0 0], L_0xb4cdf7660, L_0xb4d258fa0;
L_0xb4d251b80 .arith/sum 40, L_0xb4c855b10, L_0xb4cdf7700;
S_0xb4d236d00 .scope generate, "GEN_MAC[13]" "GEN_MAC[13]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd99180 .param/l "i" 1 6 17, +C4<01101>;
S_0xb4d236e80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d236d00;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8f780 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8f7c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8f800 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdba1c0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf77a0;  1 drivers
v0xb4cdba260_0 .net/s *"_ivl_2", 31 0, L_0xb4cdf7840;  1 drivers
v0xb4cdba300_0 .net *"_ivl_7", 0 0, L_0xb4d259180;  1 drivers
v0xb4cdba3a0_0 .net *"_ivl_9", 7 0, L_0xb4d259220;  1 drivers
L_0xb4c855b58 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdba440_0 .net/s "acc_in", 39 0, L_0xb4c855b58;  1 drivers
v0xb4cdba4e0_0 .net/s "acc_out", 39 0, L_0xb4d251c20;  alias, 1 drivers
v0xb4cdba580_0 .net/s "product", 31 0, L_0xb4cdf78e0;  1 drivers
v0xb4cdba620_0 .net/s "product_ext", 39 0, L_0xb4cdf7980;  1 drivers
v0xb4cdba6c0_0 .net/s "w", 15 0, L_0xb4d259360;  1 drivers
v0xb4cdba760_0 .net/s "x", 15 0, L_0xb4d2592c0;  1 drivers
L_0xb4cdf77a0 .extend/s 32, L_0xb4d2592c0;
L_0xb4cdf7840 .extend/s 32, L_0xb4d259360;
L_0xb4cdf78e0 .arith/mult 32, L_0xb4cdf77a0, L_0xb4cdf7840;
L_0xb4d259180 .part L_0xb4cdf78e0, 31, 1;
L_0xb4d259220 .repeat 8, 8, L_0xb4d259180;
L_0xb4cdf7980 .concat [ 32 8 0 0], L_0xb4cdf78e0, L_0xb4d259220;
L_0xb4d251c20 .arith/sum 40, L_0xb4c855b58, L_0xb4cdf7980;
S_0xb4d237000 .scope generate, "GEN_MAC[14]" "GEN_MAC[14]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd991c0 .param/l "i" 1 6 17, +C4<01110>;
S_0xb4d237180 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d237000;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8f840 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8f880 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8f8c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdba800_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf7a20;  1 drivers
v0xb4cdba8a0_0 .net/s *"_ivl_2", 31 0, L_0xb4cdf7ac0;  1 drivers
v0xb4cdba940_0 .net *"_ivl_7", 0 0, L_0xb4d259400;  1 drivers
v0xb4cdba9e0_0 .net *"_ivl_9", 7 0, L_0xb4d2594a0;  1 drivers
L_0xb4c855ba0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdbaa80_0 .net/s "acc_in", 39 0, L_0xb4c855ba0;  1 drivers
v0xb4cdbab20_0 .net/s "acc_out", 39 0, L_0xb4d251cc0;  alias, 1 drivers
v0xb4cdbabc0_0 .net/s "product", 31 0, L_0xb4cdf7b60;  1 drivers
v0xb4cdbac60_0 .net/s "product_ext", 39 0, L_0xb4cdf7c00;  1 drivers
v0xb4cdbad00_0 .net/s "w", 15 0, L_0xb4d2595e0;  1 drivers
v0xb4cdbada0_0 .net/s "x", 15 0, L_0xb4d259540;  1 drivers
L_0xb4cdf7a20 .extend/s 32, L_0xb4d259540;
L_0xb4cdf7ac0 .extend/s 32, L_0xb4d2595e0;
L_0xb4cdf7b60 .arith/mult 32, L_0xb4cdf7a20, L_0xb4cdf7ac0;
L_0xb4d259400 .part L_0xb4cdf7b60, 31, 1;
L_0xb4d2594a0 .repeat 8, 8, L_0xb4d259400;
L_0xb4cdf7c00 .concat [ 32 8 0 0], L_0xb4cdf7b60, L_0xb4d2594a0;
L_0xb4d251cc0 .arith/sum 40, L_0xb4c855ba0, L_0xb4cdf7c00;
S_0xb4d237300 .scope generate, "GEN_MAC[15]" "GEN_MAC[15]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd99200 .param/l "i" 1 6 17, +C4<01111>;
S_0xb4d237480 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d237300;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8f900 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8f940 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8f980 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdbae40_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf7ca0;  1 drivers
v0xb4cdbaee0_0 .net/s *"_ivl_2", 31 0, L_0xb4cdf7d40;  1 drivers
v0xb4cdbaf80_0 .net *"_ivl_7", 0 0, L_0xb4d259680;  1 drivers
v0xb4cdbb020_0 .net *"_ivl_9", 7 0, L_0xb4d259720;  1 drivers
L_0xb4c855be8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdbb0c0_0 .net/s "acc_in", 39 0, L_0xb4c855be8;  1 drivers
v0xb4cdbb160_0 .net/s "acc_out", 39 0, L_0xb4d251d60;  alias, 1 drivers
v0xb4cdbb200_0 .net/s "product", 31 0, L_0xb4cdf7de0;  1 drivers
v0xb4cdbb2a0_0 .net/s "product_ext", 39 0, L_0xb4cdf7e80;  1 drivers
v0xb4cdbb340_0 .net/s "w", 15 0, L_0xb4d259860;  1 drivers
v0xb4cdbb3e0_0 .net/s "x", 15 0, L_0xb4d2597c0;  1 drivers
L_0xb4cdf7ca0 .extend/s 32, L_0xb4d2597c0;
L_0xb4cdf7d40 .extend/s 32, L_0xb4d259860;
L_0xb4cdf7de0 .arith/mult 32, L_0xb4cdf7ca0, L_0xb4cdf7d40;
L_0xb4d259680 .part L_0xb4cdf7de0, 31, 1;
L_0xb4d259720 .repeat 8, 8, L_0xb4d259680;
L_0xb4cdf7e80 .concat [ 32 8 0 0], L_0xb4cdf7de0, L_0xb4d259720;
L_0xb4d251d60 .arith/sum 40, L_0xb4c855be8, L_0xb4cdf7e80;
S_0xb4d237600 .scope generate, "GEN_MAC[16]" "GEN_MAC[16]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd99240 .param/l "i" 1 6 17, +C4<010000>;
S_0xb4d237780 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d237600;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8f9c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8fa00 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8fa40 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdbb480_0 .net/s *"_ivl_0", 31 0, L_0xb4cdf7f20;  1 drivers
v0xb4cdbb520_0 .net/s *"_ivl_2", 31 0, L_0xb4cdfc000;  1 drivers
v0xb4cdbb5c0_0 .net *"_ivl_7", 0 0, L_0xb4d259900;  1 drivers
v0xb4cdbb660_0 .net *"_ivl_9", 7 0, L_0xb4d2599a0;  1 drivers
L_0xb4c855c30 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdbb700_0 .net/s "acc_in", 39 0, L_0xb4c855c30;  1 drivers
v0xb4cdbb7a0_0 .net/s "acc_out", 39 0, L_0xb4d251e00;  alias, 1 drivers
v0xb4cdbb840_0 .net/s "product", 31 0, L_0xb4cdfc0a0;  1 drivers
v0xb4cdbb8e0_0 .net/s "product_ext", 39 0, L_0xb4cdfc140;  1 drivers
v0xb4cdbb980_0 .net/s "w", 15 0, L_0xb4d259ae0;  1 drivers
v0xb4cdbba20_0 .net/s "x", 15 0, L_0xb4d259a40;  1 drivers
L_0xb4cdf7f20 .extend/s 32, L_0xb4d259a40;
L_0xb4cdfc000 .extend/s 32, L_0xb4d259ae0;
L_0xb4cdfc0a0 .arith/mult 32, L_0xb4cdf7f20, L_0xb4cdfc000;
L_0xb4d259900 .part L_0xb4cdfc0a0, 31, 1;
L_0xb4d2599a0 .repeat 8, 8, L_0xb4d259900;
L_0xb4cdfc140 .concat [ 32 8 0 0], L_0xb4cdfc0a0, L_0xb4d2599a0;
L_0xb4d251e00 .arith/sum 40, L_0xb4c855c30, L_0xb4cdfc140;
S_0xb4d237900 .scope generate, "GEN_MAC[17]" "GEN_MAC[17]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd99280 .param/l "i" 1 6 17, +C4<010001>;
S_0xb4d237a80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d237900;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8fa80 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8fac0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8fb00 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdbbac0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdfc1e0;  1 drivers
v0xb4cdbbb60_0 .net/s *"_ivl_2", 31 0, L_0xb4cdfc280;  1 drivers
v0xb4cdbbc00_0 .net *"_ivl_7", 0 0, L_0xb4d259b80;  1 drivers
v0xb4cdbbca0_0 .net *"_ivl_9", 7 0, L_0xb4d259c20;  1 drivers
L_0xb4c855c78 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdbbd40_0 .net/s "acc_in", 39 0, L_0xb4c855c78;  1 drivers
v0xb4cdbbde0_0 .net/s "acc_out", 39 0, L_0xb4d251ea0;  alias, 1 drivers
v0xb4cdbbe80_0 .net/s "product", 31 0, L_0xb4cdfc320;  1 drivers
v0xb4cdbbf20_0 .net/s "product_ext", 39 0, L_0xb4cdfc3c0;  1 drivers
v0xb4cdbc000_0 .net/s "w", 15 0, L_0xb4d259d60;  1 drivers
v0xb4cdbc0a0_0 .net/s "x", 15 0, L_0xb4d259cc0;  1 drivers
L_0xb4cdfc1e0 .extend/s 32, L_0xb4d259cc0;
L_0xb4cdfc280 .extend/s 32, L_0xb4d259d60;
L_0xb4cdfc320 .arith/mult 32, L_0xb4cdfc1e0, L_0xb4cdfc280;
L_0xb4d259b80 .part L_0xb4cdfc320, 31, 1;
L_0xb4d259c20 .repeat 8, 8, L_0xb4d259b80;
L_0xb4cdfc3c0 .concat [ 32 8 0 0], L_0xb4cdfc320, L_0xb4d259c20;
L_0xb4d251ea0 .arith/sum 40, L_0xb4c855c78, L_0xb4cdfc3c0;
S_0xb4d237c00 .scope generate, "GEN_MAC[18]" "GEN_MAC[18]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd992c0 .param/l "i" 1 6 17, +C4<010010>;
S_0xb4d237d80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d237c00;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8fb40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8fb80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8fbc0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdbc140_0 .net/s *"_ivl_0", 31 0, L_0xb4cdfc460;  1 drivers
v0xb4cdbc1e0_0 .net/s *"_ivl_2", 31 0, L_0xb4cdfc500;  1 drivers
v0xb4cdbc280_0 .net *"_ivl_7", 0 0, L_0xb4d259e00;  1 drivers
v0xb4cdbc320_0 .net *"_ivl_9", 7 0, L_0xb4d259ea0;  1 drivers
L_0xb4c855cc0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdbc3c0_0 .net/s "acc_in", 39 0, L_0xb4c855cc0;  1 drivers
v0xb4cdbc460_0 .net/s "acc_out", 39 0, L_0xb4d251f40;  alias, 1 drivers
v0xb4cdbc500_0 .net/s "product", 31 0, L_0xb4cdfc5a0;  1 drivers
v0xb4cdbc5a0_0 .net/s "product_ext", 39 0, L_0xb4cdfc640;  1 drivers
v0xb4cdbc640_0 .net/s "w", 15 0, L_0xb4d259fe0;  1 drivers
v0xb4cdbc6e0_0 .net/s "x", 15 0, L_0xb4d259f40;  1 drivers
L_0xb4cdfc460 .extend/s 32, L_0xb4d259f40;
L_0xb4cdfc500 .extend/s 32, L_0xb4d259fe0;
L_0xb4cdfc5a0 .arith/mult 32, L_0xb4cdfc460, L_0xb4cdfc500;
L_0xb4d259e00 .part L_0xb4cdfc5a0, 31, 1;
L_0xb4d259ea0 .repeat 8, 8, L_0xb4d259e00;
L_0xb4cdfc640 .concat [ 32 8 0 0], L_0xb4cdfc5a0, L_0xb4d259ea0;
L_0xb4d251f40 .arith/sum 40, L_0xb4c855cc0, L_0xb4cdfc640;
S_0xb4d238000 .scope generate, "GEN_MAC[19]" "GEN_MAC[19]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd99300 .param/l "i" 1 6 17, +C4<010011>;
S_0xb4d238180 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d238000;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8fc00 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8fc40 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8fc80 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdbc780_0 .net/s *"_ivl_0", 31 0, L_0xb4cdfc6e0;  1 drivers
v0xb4cdbc820_0 .net/s *"_ivl_2", 31 0, L_0xb4cdfc780;  1 drivers
v0xb4cdbc8c0_0 .net *"_ivl_7", 0 0, L_0xb4d25a080;  1 drivers
v0xb4cdbc960_0 .net *"_ivl_9", 7 0, L_0xb4d25a120;  1 drivers
L_0xb4c855d08 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdbca00_0 .net/s "acc_in", 39 0, L_0xb4c855d08;  1 drivers
v0xb4cdbcaa0_0 .net/s "acc_out", 39 0, L_0xb4d251fe0;  alias, 1 drivers
v0xb4cdbcb40_0 .net/s "product", 31 0, L_0xb4cdfc820;  1 drivers
v0xb4cdbcbe0_0 .net/s "product_ext", 39 0, L_0xb4cdfc8c0;  1 drivers
v0xb4cdbcc80_0 .net/s "w", 15 0, L_0xb4d25a260;  1 drivers
v0xb4cdbcd20_0 .net/s "x", 15 0, L_0xb4d25a1c0;  1 drivers
L_0xb4cdfc6e0 .extend/s 32, L_0xb4d25a1c0;
L_0xb4cdfc780 .extend/s 32, L_0xb4d25a260;
L_0xb4cdfc820 .arith/mult 32, L_0xb4cdfc6e0, L_0xb4cdfc780;
L_0xb4d25a080 .part L_0xb4cdfc820, 31, 1;
L_0xb4d25a120 .repeat 8, 8, L_0xb4d25a080;
L_0xb4cdfc8c0 .concat [ 32 8 0 0], L_0xb4cdfc820, L_0xb4d25a120;
L_0xb4d251fe0 .arith/sum 40, L_0xb4c855d08, L_0xb4cdfc8c0;
S_0xb4d238300 .scope generate, "GEN_MAC[20]" "GEN_MAC[20]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd99340 .param/l "i" 1 6 17, +C4<010100>;
S_0xb4d238480 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d238300;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8fcc0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8fd00 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8fd40 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdbcdc0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdfc960;  1 drivers
v0xb4cdbce60_0 .net/s *"_ivl_2", 31 0, L_0xb4cdfca00;  1 drivers
v0xb4cdbcf00_0 .net *"_ivl_7", 0 0, L_0xb4d25a300;  1 drivers
v0xb4cdbcfa0_0 .net *"_ivl_9", 7 0, L_0xb4d25a3a0;  1 drivers
L_0xb4c855d50 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdbd040_0 .net/s "acc_in", 39 0, L_0xb4c855d50;  1 drivers
v0xb4cdbd0e0_0 .net/s "acc_out", 39 0, L_0xb4d252080;  alias, 1 drivers
v0xb4cdbd180_0 .net/s "product", 31 0, L_0xb4cdfcaa0;  1 drivers
v0xb4cdbd220_0 .net/s "product_ext", 39 0, L_0xb4cdfcb40;  1 drivers
v0xb4cdbd2c0_0 .net/s "w", 15 0, L_0xb4d25a4e0;  1 drivers
v0xb4cdbd360_0 .net/s "x", 15 0, L_0xb4d25a440;  1 drivers
L_0xb4cdfc960 .extend/s 32, L_0xb4d25a440;
L_0xb4cdfca00 .extend/s 32, L_0xb4d25a4e0;
L_0xb4cdfcaa0 .arith/mult 32, L_0xb4cdfc960, L_0xb4cdfca00;
L_0xb4d25a300 .part L_0xb4cdfcaa0, 31, 1;
L_0xb4d25a3a0 .repeat 8, 8, L_0xb4d25a300;
L_0xb4cdfcb40 .concat [ 32 8 0 0], L_0xb4cdfcaa0, L_0xb4d25a3a0;
L_0xb4d252080 .arith/sum 40, L_0xb4c855d50, L_0xb4cdfcb40;
S_0xb4d238600 .scope generate, "GEN_MAC[21]" "GEN_MAC[21]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd99380 .param/l "i" 1 6 17, +C4<010101>;
S_0xb4d238780 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d238600;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8fd80 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8fdc0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8fe00 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdbd400_0 .net/s *"_ivl_0", 31 0, L_0xb4cdfcbe0;  1 drivers
v0xb4cdbd4a0_0 .net/s *"_ivl_2", 31 0, L_0xb4cdfcc80;  1 drivers
v0xb4cdbd540_0 .net *"_ivl_7", 0 0, L_0xb4d25a580;  1 drivers
v0xb4cdbd5e0_0 .net *"_ivl_9", 7 0, L_0xb4d25a620;  1 drivers
L_0xb4c855d98 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdbd680_0 .net/s "acc_in", 39 0, L_0xb4c855d98;  1 drivers
v0xb4cdbd720_0 .net/s "acc_out", 39 0, L_0xb4d252120;  alias, 1 drivers
v0xb4cdbd7c0_0 .net/s "product", 31 0, L_0xb4cdfcd20;  1 drivers
v0xb4cdbd860_0 .net/s "product_ext", 39 0, L_0xb4cdfcdc0;  1 drivers
v0xb4cdbd900_0 .net/s "w", 15 0, L_0xb4d25a760;  1 drivers
v0xb4cdbd9a0_0 .net/s "x", 15 0, L_0xb4d25a6c0;  1 drivers
L_0xb4cdfcbe0 .extend/s 32, L_0xb4d25a6c0;
L_0xb4cdfcc80 .extend/s 32, L_0xb4d25a760;
L_0xb4cdfcd20 .arith/mult 32, L_0xb4cdfcbe0, L_0xb4cdfcc80;
L_0xb4d25a580 .part L_0xb4cdfcd20, 31, 1;
L_0xb4d25a620 .repeat 8, 8, L_0xb4d25a580;
L_0xb4cdfcdc0 .concat [ 32 8 0 0], L_0xb4cdfcd20, L_0xb4d25a620;
L_0xb4d252120 .arith/sum 40, L_0xb4c855d98, L_0xb4cdfcdc0;
S_0xb4d238900 .scope generate, "GEN_MAC[22]" "GEN_MAC[22]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd993c0 .param/l "i" 1 6 17, +C4<010110>;
S_0xb4d238a80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d238900;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8fe40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8fe80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8fec0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdbda40_0 .net/s *"_ivl_0", 31 0, L_0xb4cdfce60;  1 drivers
v0xb4cdbdae0_0 .net/s *"_ivl_2", 31 0, L_0xb4cdfcf00;  1 drivers
v0xb4cdbdb80_0 .net *"_ivl_7", 0 0, L_0xb4d25a800;  1 drivers
v0xb4cdbdc20_0 .net *"_ivl_9", 7 0, L_0xb4d25a8a0;  1 drivers
L_0xb4c855de0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdbdcc0_0 .net/s "acc_in", 39 0, L_0xb4c855de0;  1 drivers
v0xb4cdbdd60_0 .net/s "acc_out", 39 0, L_0xb4d2521c0;  alias, 1 drivers
v0xb4cdbde00_0 .net/s "product", 31 0, L_0xb4cdfcfa0;  1 drivers
v0xb4cdbdea0_0 .net/s "product_ext", 39 0, L_0xb4cdfd040;  1 drivers
v0xb4cdbdf40_0 .net/s "w", 15 0, L_0xb4d25a9e0;  1 drivers
v0xb4cdbdfe0_0 .net/s "x", 15 0, L_0xb4d25a940;  1 drivers
L_0xb4cdfce60 .extend/s 32, L_0xb4d25a940;
L_0xb4cdfcf00 .extend/s 32, L_0xb4d25a9e0;
L_0xb4cdfcfa0 .arith/mult 32, L_0xb4cdfce60, L_0xb4cdfcf00;
L_0xb4d25a800 .part L_0xb4cdfcfa0, 31, 1;
L_0xb4d25a8a0 .repeat 8, 8, L_0xb4d25a800;
L_0xb4cdfd040 .concat [ 32 8 0 0], L_0xb4cdfcfa0, L_0xb4d25a8a0;
L_0xb4d2521c0 .arith/sum 40, L_0xb4c855de0, L_0xb4cdfd040;
S_0xb4d238c00 .scope generate, "GEN_MAC[23]" "GEN_MAC[23]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd99400 .param/l "i" 1 6 17, +C4<010111>;
S_0xb4d238d80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d238c00;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cd8ff00 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cd8ff40 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cd8ff80 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdbe080_0 .net/s *"_ivl_0", 31 0, L_0xb4cdfd0e0;  1 drivers
v0xb4cdbe120_0 .net/s *"_ivl_2", 31 0, L_0xb4cdfd180;  1 drivers
v0xb4cdbe1c0_0 .net *"_ivl_7", 0 0, L_0xb4d25aa80;  1 drivers
v0xb4cdbe260_0 .net *"_ivl_9", 7 0, L_0xb4d25ab20;  1 drivers
L_0xb4c855e28 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdbe300_0 .net/s "acc_in", 39 0, L_0xb4c855e28;  1 drivers
v0xb4cdbe3a0_0 .net/s "acc_out", 39 0, L_0xb4d252260;  alias, 1 drivers
v0xb4cdbe440_0 .net/s "product", 31 0, L_0xb4cdfd220;  1 drivers
v0xb4cdbe4e0_0 .net/s "product_ext", 39 0, L_0xb4cdfd2c0;  1 drivers
v0xb4cdbe580_0 .net/s "w", 15 0, L_0xb4d25ac60;  1 drivers
v0xb4cdbe620_0 .net/s "x", 15 0, L_0xb4d25abc0;  1 drivers
L_0xb4cdfd0e0 .extend/s 32, L_0xb4d25abc0;
L_0xb4cdfd180 .extend/s 32, L_0xb4d25ac60;
L_0xb4cdfd220 .arith/mult 32, L_0xb4cdfd0e0, L_0xb4cdfd180;
L_0xb4d25aa80 .part L_0xb4cdfd220, 31, 1;
L_0xb4d25ab20 .repeat 8, 8, L_0xb4d25aa80;
L_0xb4cdfd2c0 .concat [ 32 8 0 0], L_0xb4cdfd220, L_0xb4d25ab20;
L_0xb4d252260 .arith/sum 40, L_0xb4c855e28, L_0xb4cdfd2c0;
S_0xb4d238f00 .scope generate, "GEN_MAC[24]" "GEN_MAC[24]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd99440 .param/l "i" 1 6 17, +C4<011000>;
S_0xb4d239080 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d238f00;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc0000 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc0040 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc0080 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdbe6c0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdfd360;  1 drivers
v0xb4cdbe760_0 .net/s *"_ivl_2", 31 0, L_0xb4cdfd400;  1 drivers
v0xb4cdbe800_0 .net *"_ivl_7", 0 0, L_0xb4d25ad00;  1 drivers
v0xb4cdbe8a0_0 .net *"_ivl_9", 7 0, L_0xb4d25ada0;  1 drivers
L_0xb4c855e70 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdbe940_0 .net/s "acc_in", 39 0, L_0xb4c855e70;  1 drivers
v0xb4cdbe9e0_0 .net/s "acc_out", 39 0, L_0xb4d252300;  alias, 1 drivers
v0xb4cdbea80_0 .net/s "product", 31 0, L_0xb4cdfd4a0;  1 drivers
v0xb4cdbeb20_0 .net/s "product_ext", 39 0, L_0xb4cdfd540;  1 drivers
v0xb4cdbebc0_0 .net/s "w", 15 0, L_0xb4d25aee0;  1 drivers
v0xb4cdbec60_0 .net/s "x", 15 0, L_0xb4d25ae40;  1 drivers
L_0xb4cdfd360 .extend/s 32, L_0xb4d25ae40;
L_0xb4cdfd400 .extend/s 32, L_0xb4d25aee0;
L_0xb4cdfd4a0 .arith/mult 32, L_0xb4cdfd360, L_0xb4cdfd400;
L_0xb4d25ad00 .part L_0xb4cdfd4a0, 31, 1;
L_0xb4d25ada0 .repeat 8, 8, L_0xb4d25ad00;
L_0xb4cdfd540 .concat [ 32 8 0 0], L_0xb4cdfd4a0, L_0xb4d25ada0;
L_0xb4d252300 .arith/sum 40, L_0xb4c855e70, L_0xb4cdfd540;
S_0xb4d239200 .scope generate, "GEN_MAC[25]" "GEN_MAC[25]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd99480 .param/l "i" 1 6 17, +C4<011001>;
S_0xb4d239380 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d239200;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc00c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc0100 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc0140 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdbed00_0 .net/s *"_ivl_0", 31 0, L_0xb4cdfd5e0;  1 drivers
v0xb4cdbeda0_0 .net/s *"_ivl_2", 31 0, L_0xb4cdfd680;  1 drivers
v0xb4cdbee40_0 .net *"_ivl_7", 0 0, L_0xb4d25af80;  1 drivers
v0xb4cdbeee0_0 .net *"_ivl_9", 7 0, L_0xb4d25b020;  1 drivers
L_0xb4c855eb8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdbef80_0 .net/s "acc_in", 39 0, L_0xb4c855eb8;  1 drivers
v0xb4cdbf020_0 .net/s "acc_out", 39 0, L_0xb4d2523a0;  alias, 1 drivers
v0xb4cdbf0c0_0 .net/s "product", 31 0, L_0xb4cdfd720;  1 drivers
v0xb4cdbf160_0 .net/s "product_ext", 39 0, L_0xb4cdfd7c0;  1 drivers
v0xb4cdbf200_0 .net/s "w", 15 0, L_0xb4d25b160;  1 drivers
v0xb4cdbf2a0_0 .net/s "x", 15 0, L_0xb4d25b0c0;  1 drivers
L_0xb4cdfd5e0 .extend/s 32, L_0xb4d25b0c0;
L_0xb4cdfd680 .extend/s 32, L_0xb4d25b160;
L_0xb4cdfd720 .arith/mult 32, L_0xb4cdfd5e0, L_0xb4cdfd680;
L_0xb4d25af80 .part L_0xb4cdfd720, 31, 1;
L_0xb4d25b020 .repeat 8, 8, L_0xb4d25af80;
L_0xb4cdfd7c0 .concat [ 32 8 0 0], L_0xb4cdfd720, L_0xb4d25b020;
L_0xb4d2523a0 .arith/sum 40, L_0xb4c855eb8, L_0xb4cdfd7c0;
S_0xb4d239500 .scope generate, "GEN_MAC[26]" "GEN_MAC[26]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd994c0 .param/l "i" 1 6 17, +C4<011010>;
S_0xb4d239680 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d239500;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc0180 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc01c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc0200 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdbf340_0 .net/s *"_ivl_0", 31 0, L_0xb4cdfd860;  1 drivers
v0xb4cdbf3e0_0 .net/s *"_ivl_2", 31 0, L_0xb4cdfd900;  1 drivers
v0xb4cdbf480_0 .net *"_ivl_7", 0 0, L_0xb4d25b200;  1 drivers
v0xb4cdbf520_0 .net *"_ivl_9", 7 0, L_0xb4d25b2a0;  1 drivers
L_0xb4c855f00 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdbf5c0_0 .net/s "acc_in", 39 0, L_0xb4c855f00;  1 drivers
v0xb4cdbf660_0 .net/s "acc_out", 39 0, L_0xb4d252440;  alias, 1 drivers
v0xb4cdbf700_0 .net/s "product", 31 0, L_0xb4cdfd9a0;  1 drivers
v0xb4cdbf7a0_0 .net/s "product_ext", 39 0, L_0xb4cdfda40;  1 drivers
v0xb4cdbf840_0 .net/s "w", 15 0, L_0xb4d25b3e0;  1 drivers
v0xb4cdbf8e0_0 .net/s "x", 15 0, L_0xb4d25b340;  1 drivers
L_0xb4cdfd860 .extend/s 32, L_0xb4d25b340;
L_0xb4cdfd900 .extend/s 32, L_0xb4d25b3e0;
L_0xb4cdfd9a0 .arith/mult 32, L_0xb4cdfd860, L_0xb4cdfd900;
L_0xb4d25b200 .part L_0xb4cdfd9a0, 31, 1;
L_0xb4d25b2a0 .repeat 8, 8, L_0xb4d25b200;
L_0xb4cdfda40 .concat [ 32 8 0 0], L_0xb4cdfd9a0, L_0xb4d25b2a0;
L_0xb4d252440 .arith/sum 40, L_0xb4c855f00, L_0xb4cdfda40;
S_0xb4d239800 .scope generate, "GEN_MAC[27]" "GEN_MAC[27]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd99500 .param/l "i" 1 6 17, +C4<011011>;
S_0xb4d239980 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d239800;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc0240 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc0280 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc02c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdbf980_0 .net/s *"_ivl_0", 31 0, L_0xb4cdfdae0;  1 drivers
v0xb4cdbfa20_0 .net/s *"_ivl_2", 31 0, L_0xb4cdfdb80;  1 drivers
v0xb4cdbfac0_0 .net *"_ivl_7", 0 0, L_0xb4d25b480;  1 drivers
v0xb4cdbfb60_0 .net *"_ivl_9", 7 0, L_0xb4d25b520;  1 drivers
L_0xb4c855f48 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdbfc00_0 .net/s "acc_in", 39 0, L_0xb4c855f48;  1 drivers
v0xb4cdbfca0_0 .net/s "acc_out", 39 0, L_0xb4d2524e0;  alias, 1 drivers
v0xb4cdbfd40_0 .net/s "product", 31 0, L_0xb4cdfdc20;  1 drivers
v0xb4cdbfde0_0 .net/s "product_ext", 39 0, L_0xb4cdfdcc0;  1 drivers
v0xb4cdbfe80_0 .net/s "w", 15 0, L_0xb4d25b660;  1 drivers
v0xb4cdbff20_0 .net/s "x", 15 0, L_0xb4d25b5c0;  1 drivers
L_0xb4cdfdae0 .extend/s 32, L_0xb4d25b5c0;
L_0xb4cdfdb80 .extend/s 32, L_0xb4d25b660;
L_0xb4cdfdc20 .arith/mult 32, L_0xb4cdfdae0, L_0xb4cdfdb80;
L_0xb4d25b480 .part L_0xb4cdfdc20, 31, 1;
L_0xb4d25b520 .repeat 8, 8, L_0xb4d25b480;
L_0xb4cdfdcc0 .concat [ 32 8 0 0], L_0xb4cdfdc20, L_0xb4d25b520;
L_0xb4d2524e0 .arith/sum 40, L_0xb4c855f48, L_0xb4cdfdcc0;
S_0xb4d239b00 .scope generate, "GEN_MAC[28]" "GEN_MAC[28]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd99540 .param/l "i" 1 6 17, +C4<011100>;
S_0xb4d239c80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d239b00;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc0300 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc0340 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc0380 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdc4000_0 .net/s *"_ivl_0", 31 0, L_0xb4cdfdd60;  1 drivers
v0xb4cdc40a0_0 .net/s *"_ivl_2", 31 0, L_0xb4cdfde00;  1 drivers
v0xb4cdc4140_0 .net *"_ivl_7", 0 0, L_0xb4d25b700;  1 drivers
v0xb4cdc41e0_0 .net *"_ivl_9", 7 0, L_0xb4d25b7a0;  1 drivers
L_0xb4c855f90 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdc4280_0 .net/s "acc_in", 39 0, L_0xb4c855f90;  1 drivers
v0xb4cdc4320_0 .net/s "acc_out", 39 0, L_0xb4d252580;  alias, 1 drivers
v0xb4cdc43c0_0 .net/s "product", 31 0, L_0xb4cdfdea0;  1 drivers
v0xb4cdc4460_0 .net/s "product_ext", 39 0, L_0xb4cdfdf40;  1 drivers
v0xb4cdc4500_0 .net/s "w", 15 0, L_0xb4d25b8e0;  1 drivers
v0xb4cdc45a0_0 .net/s "x", 15 0, L_0xb4d25b840;  1 drivers
L_0xb4cdfdd60 .extend/s 32, L_0xb4d25b840;
L_0xb4cdfde00 .extend/s 32, L_0xb4d25b8e0;
L_0xb4cdfdea0 .arith/mult 32, L_0xb4cdfdd60, L_0xb4cdfde00;
L_0xb4d25b700 .part L_0xb4cdfdea0, 31, 1;
L_0xb4d25b7a0 .repeat 8, 8, L_0xb4d25b700;
L_0xb4cdfdf40 .concat [ 32 8 0 0], L_0xb4cdfdea0, L_0xb4d25b7a0;
L_0xb4d252580 .arith/sum 40, L_0xb4c855f90, L_0xb4cdfdf40;
S_0xb4d239e00 .scope generate, "GEN_MAC[29]" "GEN_MAC[29]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd99580 .param/l "i" 1 6 17, +C4<011101>;
S_0xb4d239f80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d239e00;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc03c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc0400 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc0440 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdc4640_0 .net/s *"_ivl_0", 31 0, L_0xb4cdfdfe0;  1 drivers
v0xb4cdc46e0_0 .net/s *"_ivl_2", 31 0, L_0xb4cdfe080;  1 drivers
v0xb4cdc4780_0 .net *"_ivl_7", 0 0, L_0xb4d25b980;  1 drivers
v0xb4cdc4820_0 .net *"_ivl_9", 7 0, L_0xb4d25ba20;  1 drivers
L_0xb4c855fd8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdc48c0_0 .net/s "acc_in", 39 0, L_0xb4c855fd8;  1 drivers
v0xb4cdc4960_0 .net/s "acc_out", 39 0, L_0xb4d252620;  alias, 1 drivers
v0xb4cdc4a00_0 .net/s "product", 31 0, L_0xb4cdfe120;  1 drivers
v0xb4cdc4aa0_0 .net/s "product_ext", 39 0, L_0xb4cdfe1c0;  1 drivers
v0xb4cdc4b40_0 .net/s "w", 15 0, L_0xb4d25bb60;  1 drivers
v0xb4cdc4be0_0 .net/s "x", 15 0, L_0xb4d25bac0;  1 drivers
L_0xb4cdfdfe0 .extend/s 32, L_0xb4d25bac0;
L_0xb4cdfe080 .extend/s 32, L_0xb4d25bb60;
L_0xb4cdfe120 .arith/mult 32, L_0xb4cdfdfe0, L_0xb4cdfe080;
L_0xb4d25b980 .part L_0xb4cdfe120, 31, 1;
L_0xb4d25ba20 .repeat 8, 8, L_0xb4d25b980;
L_0xb4cdfe1c0 .concat [ 32 8 0 0], L_0xb4cdfe120, L_0xb4d25ba20;
L_0xb4d252620 .arith/sum 40, L_0xb4c855fd8, L_0xb4cdfe1c0;
S_0xb4d23a100 .scope generate, "GEN_MAC[30]" "GEN_MAC[30]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd995c0 .param/l "i" 1 6 17, +C4<011110>;
S_0xb4d23a280 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d23a100;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc0480 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc04c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc0500 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdc4c80_0 .net/s *"_ivl_0", 31 0, L_0xb4cdfe260;  1 drivers
v0xb4cdc4d20_0 .net/s *"_ivl_2", 31 0, L_0xb4cdfe300;  1 drivers
v0xb4cdc4dc0_0 .net *"_ivl_7", 0 0, L_0xb4d25bc00;  1 drivers
v0xb4cdc4e60_0 .net *"_ivl_9", 7 0, L_0xb4d25bca0;  1 drivers
L_0xb4c856020 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdc4f00_0 .net/s "acc_in", 39 0, L_0xb4c856020;  1 drivers
v0xb4cdc4fa0_0 .net/s "acc_out", 39 0, L_0xb4d2526c0;  alias, 1 drivers
v0xb4cdc5040_0 .net/s "product", 31 0, L_0xb4cdfe3a0;  1 drivers
v0xb4cdc50e0_0 .net/s "product_ext", 39 0, L_0xb4cdfe440;  1 drivers
v0xb4cdc5180_0 .net/s "w", 15 0, L_0xb4d25bde0;  1 drivers
v0xb4cdc5220_0 .net/s "x", 15 0, L_0xb4d25bd40;  1 drivers
L_0xb4cdfe260 .extend/s 32, L_0xb4d25bd40;
L_0xb4cdfe300 .extend/s 32, L_0xb4d25bde0;
L_0xb4cdfe3a0 .arith/mult 32, L_0xb4cdfe260, L_0xb4cdfe300;
L_0xb4d25bc00 .part L_0xb4cdfe3a0, 31, 1;
L_0xb4d25bca0 .repeat 8, 8, L_0xb4d25bc00;
L_0xb4cdfe440 .concat [ 32 8 0 0], L_0xb4cdfe3a0, L_0xb4d25bca0;
L_0xb4d2526c0 .arith/sum 40, L_0xb4c856020, L_0xb4cdfe440;
S_0xb4d23a400 .scope generate, "GEN_MAC[31]" "GEN_MAC[31]" 6 17, 6 17 0, S_0xb4d234480;
 .timescale 0 0;
P_0xb4cd99600 .param/l "i" 1 6 17, +C4<011111>;
S_0xb4d23a580 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d23a400;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc0540 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc0580 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc05c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdc52c0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdfe4e0;  1 drivers
v0xb4cdc5360_0 .net/s *"_ivl_2", 31 0, L_0xb4cdfe580;  1 drivers
v0xb4cdc5400_0 .net *"_ivl_7", 0 0, L_0xb4d25be80;  1 drivers
v0xb4cdc54a0_0 .net *"_ivl_9", 7 0, L_0xb4d25bf20;  1 drivers
L_0xb4c856068 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdc5540_0 .net/s "acc_in", 39 0, L_0xb4c856068;  1 drivers
v0xb4cdc55e0_0 .net/s "acc_out", 39 0, L_0xb4d252760;  alias, 1 drivers
v0xb4cdc5680_0 .net/s "product", 31 0, L_0xb4cdfe620;  1 drivers
v0xb4cdc5720_0 .net/s "product_ext", 39 0, L_0xb4cdfe6c0;  1 drivers
v0xb4cdc57c0_0 .net/s "w", 15 0, L_0xb4d2600a0;  1 drivers
v0xb4cdc5860_0 .net/s "x", 15 0, L_0xb4d260000;  1 drivers
L_0xb4cdfe4e0 .extend/s 32, L_0xb4d260000;
L_0xb4cdfe580 .extend/s 32, L_0xb4d2600a0;
L_0xb4cdfe620 .arith/mult 32, L_0xb4cdfe4e0, L_0xb4cdfe580;
L_0xb4d25be80 .part L_0xb4cdfe620, 31, 1;
L_0xb4d25bf20 .repeat 8, 8, L_0xb4d25be80;
L_0xb4cdfe6c0 .concat [ 32 8 0 0], L_0xb4cdfe620, L_0xb4d25bf20;
L_0xb4d252760 .arith/sum 40, L_0xb4c856068, L_0xb4cdfe6c0;
S_0xb4d23a700 .scope generate, "GEN_NEURON[3]" "GEN_NEURON[3]" 4 35, 4 35 0, S_0x1029f0550;
 .timescale 0 0;
P_0xb4cd99640 .param/l "n" 1 4 35, +C4<011>;
S_0xb4d23a880 .scope module, "u_neuron" "neuron_parallel" 4 43, 5 1 0, S_0xb4d23a700;
 .timescale 0 0;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst";
    .port_info 2 /INPUT 1 "start";
    .port_info 3 /INPUT 512 "x_bus";
    .port_info 4 /INPUT 512 "w_bus";
    .port_info 5 /INPUT 16 "bias";
    .port_info 6 /OUTPUT 16 "y";
    .port_info 7 /OUTPUT 1 "busy";
    .port_info 8 /OUTPUT 1 "done";
P_0x1029f70b0 .param/l "ACC_WIDTH" 0 5 6, +C4<00000000000000000000000000101000>;
P_0x1029f70f0 .param/l "DATA_WIDTH" 0 5 2, +C4<00000000000000000000000000010000>;
P_0x1029f7130 .param/l "FRAC_BITS" 0 5 3, +C4<00000000000000000000000000001000>;
P_0x1029f7170 .param/l "GROUPS" 1 5 21, +C4<00000000000000000000000000000001>;
P_0x1029f71b0 .param/l "GROUP_INDEX_WIDTH" 1 5 22, +C4<00000000000000000000000000000001>;
P_0x1029f71f0 .param/l "N_INPUTS" 0 5 4, +C4<00000000000000000000000000100000>;
P_0x1029f7230 .param/l "PARALLEL" 0 5 5, +C4<00000000000000000000000000100000>;
L_0x1029dc7e0 .functor BUFZ 16, L_0xb4d2659a0, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v0xb4cde0140_0 .net *"_ivl_0", 31 0, L_0xb4cdfe940;  1 drivers
v0xb4cde01e0_0 .net *"_ivl_11", 31 0, L_0xb4cdfea80;  1 drivers
v0xb4cde0280_0 .net *"_ivl_14", 31 0, L_0xb4cdfeb20;  1 drivers
L_0xb4c8561d0 .functor BUFT 1, C4<0000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cde0320_0 .net *"_ivl_17", 30 0, L_0xb4c8561d0;  1 drivers
L_0xb4c856218 .functor BUFT 1, C4<00000000000000000000000000100000>, C4<0>, C4<0>, C4<0>;
v0xb4cde03c0_0 .net/2u *"_ivl_18", 31 0, L_0xb4c856218;  1 drivers
v0xb4cde0460_0 .net *"_ivl_21", 31 0, L_0xb4cdfebc0;  1 drivers
L_0xb4c856260 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
v0xb4cde0500_0 .net/2u *"_ivl_22", 31 0, L_0xb4c856260;  1 drivers
v0xb4cde05a0_0 .net *"_ivl_25", 31 0, L_0xb4cdfec60;  1 drivers
L_0xb4c8560f8 .functor BUFT 1, C4<0000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cde0640_0 .net *"_ivl_3", 30 0, L_0xb4c8560f8;  1 drivers
v0xb4cde06e0_0 .net *"_ivl_31", 0 0, L_0xb4d265680;  1 drivers
v0xb4cde0780_0 .net *"_ivl_33", 23 0, L_0xb4d265720;  1 drivers
v0xb4cde0820_0 .net *"_ivl_36", 39 0, L_0xb4ce0bde0;  1 drivers
v0xb4cde08c0_0 .net *"_ivl_38", 31 0, L_0xb4d2657c0;  1 drivers
L_0xb4c856140 .functor BUFT 1, C4<00000000000000000000000000100000>, C4<0>, C4<0>, C4<0>;
v0xb4cde0960_0 .net/2u *"_ivl_4", 31 0, L_0xb4c856140;  1 drivers
L_0xb4c856ba8 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
v0xb4cde0a00_0 .net *"_ivl_40", 7 0, L_0xb4c856ba8;  1 drivers
v0xb4cde0aa0_0 .net *"_ivl_46", 31 0, L_0xb4d265860;  1 drivers
v0xb4cde0b40_0 .net *"_ivl_7", 31 0, L_0xb4cdfe9e0;  1 drivers
L_0xb4c856188 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
v0xb4cde0be0_0 .net/2u *"_ivl_8", 31 0, L_0xb4c856188;  1 drivers
v0xb4cde0c80_0 .var/s "acc", 39 0;
v0xb4cde0d20_0 .net/s "acc_next", 39 0, L_0xb4d253d40;  1 drivers
v0xb4cde0dc0_0 .net/s "bias", 15 0, L_0xb4d2659a0;  1 drivers
v0xb4cde0e60_0 .net/s "bias_ext", 39 0, L_0xb4ce0bd40;  1 drivers
v0xb4cde0f00_0 .net/s "bias_ext_small", 15 0, L_0x1029dc7e0;  1 drivers
v0xb4cde0fa0_0 .var "busy", 0 0;
v0xb4cde1040_0 .net "clk", 0 0, v0xb4cde2120_0;  alias, 1 drivers
v0xb4cde10e0_0 .var "done", 0 0;
v0xb4cde1180_0 .net/s "final_acc", 39 0, L_0xb4d253de0;  1 drivers
v0xb4cde1220_0 .net/s "final_value", 39 0, L_0xb4ce0be80;  1 drivers
v0xb4cde12c0_0 .var "group_index", 0 0;
v0xb4cde1360_0 .net "rst", 0 0, v0xb4cde2440_0;  alias, 1 drivers
v0xb4cde1400_0 .net "start", 0 0, v0xb4cde24e0_0;  alias, 1 drivers
v0xb4cde14a0_0 .net/s "w_bus", 511 0, L_0xb4d265900;  1 drivers
v0xb4cde1540_0 .net/s "w_group", 511 0, L_0xb4d2605a0;  1 drivers
v0xb4cde15e0_0 .net/s "x_bus", 511 0, v0xb4cde2620_0;  alias, 1 drivers
v0xb4cde1680_0 .net/s "x_group", 511 0, L_0xb4d260500;  1 drivers
v0xb4cde1720_0 .var/s "y", 15 0;
L_0xb4cdfe940 .concat [ 1 31 0 0], v0xb4cde12c0_0, L_0xb4c8560f8;
L_0xb4cdfe9e0 .arith/mult 32, L_0xb4cdfe940, L_0xb4c856140;
L_0xb4cdfea80 .arith/mult 32, L_0xb4cdfe9e0, L_0xb4c856188;
L_0xb4d260500 .part/v v0xb4cde2620_0, L_0xb4cdfea80, 512;
L_0xb4cdfeb20 .concat [ 1 31 0 0], v0xb4cde12c0_0, L_0xb4c8561d0;
L_0xb4cdfebc0 .arith/mult 32, L_0xb4cdfeb20, L_0xb4c856218;
L_0xb4cdfec60 .arith/mult 32, L_0xb4cdfebc0, L_0xb4c856260;
L_0xb4d2605a0 .part/v L_0xb4d265900, L_0xb4cdfec60, 512;
L_0xb4d265680 .part L_0x1029dc7e0, 15, 1;
L_0xb4d265720 .repeat 24, 24, L_0xb4d265680;
L_0xb4ce0bd40 .concat [ 16 24 0 0], L_0x1029dc7e0, L_0xb4d265720;
L_0xb4d2657c0 .part L_0xb4ce0bd40, 0, 32;
L_0xb4ce0bde0 .concat [ 8 32 0 0], L_0xb4c856ba8, L_0xb4d2657c0;
L_0xb4d253de0 .arith/sum 40, L_0xb4d253d40, L_0xb4ce0bde0;
L_0xb4d265860 .part L_0xb4d253de0, 8, 32;
L_0xb4ce0be80 .extend/s 40, L_0xb4d265860;
S_0xb4d23aa00 .scope module, "u_mac8" "mac8" 5 52, 6 1 0, S_0xb4d23a880;
 .timescale 0 0;
    .port_info 0 /INPUT 512 "x_bus";
    .port_info 1 /INPUT 512 "w_bus";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc0600 .param/l "ACC_WIDTH" 0 6 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc0640 .param/l "DATA_WIDTH" 0 6 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc0680 .param/l "PARALLEL" 0 6 4, +C4<00000000000000000000000000100000>;
v0xb4cddbca0_0 .net/s "acc_in", 39 0, v0xb4cde0c80_0;  1 drivers
v0xb4cddbd40_0 .net/s "acc_out", 39 0, L_0xb4d253d40;  alias, 1 drivers
v0xb4cddbde0_0 .var/i "j", 31 0;
v0xb4cddbe80 .array "products", 31 0;
v0xb4cddbe80_0 .net/s v0xb4cddbe80 0, 39 0, L_0xb4d252940; 1 drivers
v0xb4cddbe80_1 .net/s v0xb4cddbe80 1, 39 0, L_0xb4d2529e0; 1 drivers
v0xb4cddbe80_2 .net/s v0xb4cddbe80 2, 39 0, L_0xb4d252a80; 1 drivers
v0xb4cddbe80_3 .net/s v0xb4cddbe80 3, 39 0, L_0xb4d252b20; 1 drivers
v0xb4cddbe80_4 .net/s v0xb4cddbe80 4, 39 0, L_0xb4d252bc0; 1 drivers
v0xb4cddbe80_5 .net/s v0xb4cddbe80 5, 39 0, L_0xb4d252c60; 1 drivers
v0xb4cddbe80_6 .net/s v0xb4cddbe80 6, 39 0, L_0xb4d252d00; 1 drivers
v0xb4cddbe80_7 .net/s v0xb4cddbe80 7, 39 0, L_0xb4d252da0; 1 drivers
v0xb4cddbe80_8 .net/s v0xb4cddbe80 8, 39 0, L_0xb4d252e40; 1 drivers
v0xb4cddbe80_9 .net/s v0xb4cddbe80 9, 39 0, L_0xb4d252ee0; 1 drivers
v0xb4cddbe80_10 .net/s v0xb4cddbe80 10, 39 0, L_0xb4d252f80; 1 drivers
v0xb4cddbe80_11 .net/s v0xb4cddbe80 11, 39 0, L_0xb4d253020; 1 drivers
v0xb4cddbe80_12 .net/s v0xb4cddbe80 12, 39 0, L_0xb4d2530c0; 1 drivers
v0xb4cddbe80_13 .net/s v0xb4cddbe80 13, 39 0, L_0xb4d253160; 1 drivers
v0xb4cddbe80_14 .net/s v0xb4cddbe80 14, 39 0, L_0xb4d253200; 1 drivers
v0xb4cddbe80_15 .net/s v0xb4cddbe80 15, 39 0, L_0xb4d2532a0; 1 drivers
v0xb4cddbe80_16 .net/s v0xb4cddbe80 16, 39 0, L_0xb4d253340; 1 drivers
v0xb4cddbe80_17 .net/s v0xb4cddbe80 17, 39 0, L_0xb4d2533e0; 1 drivers
v0xb4cddbe80_18 .net/s v0xb4cddbe80 18, 39 0, L_0xb4d253480; 1 drivers
v0xb4cddbe80_19 .net/s v0xb4cddbe80 19, 39 0, L_0xb4d253520; 1 drivers
v0xb4cddbe80_20 .net/s v0xb4cddbe80 20, 39 0, L_0xb4d2535c0; 1 drivers
v0xb4cddbe80_21 .net/s v0xb4cddbe80 21, 39 0, L_0xb4d253660; 1 drivers
v0xb4cddbe80_22 .net/s v0xb4cddbe80 22, 39 0, L_0xb4d253700; 1 drivers
v0xb4cddbe80_23 .net/s v0xb4cddbe80 23, 39 0, L_0xb4d2537a0; 1 drivers
v0xb4cddbe80_24 .net/s v0xb4cddbe80 24, 39 0, L_0xb4d253840; 1 drivers
v0xb4cddbe80_25 .net/s v0xb4cddbe80 25, 39 0, L_0xb4d2538e0; 1 drivers
v0xb4cddbe80_26 .net/s v0xb4cddbe80 26, 39 0, L_0xb4d253980; 1 drivers
v0xb4cddbe80_27 .net/s v0xb4cddbe80 27, 39 0, L_0xb4d253a20; 1 drivers
v0xb4cddbe80_28 .net/s v0xb4cddbe80 28, 39 0, L_0xb4d253ac0; 1 drivers
v0xb4cddbe80_29 .net/s v0xb4cddbe80 29, 39 0, L_0xb4d253b60; 1 drivers
v0xb4cddbe80_30 .net/s v0xb4cddbe80 30, 39 0, L_0xb4d253c00; 1 drivers
v0xb4cddbe80_31 .net/s v0xb4cddbe80 31, 39 0, L_0xb4d253ca0; 1 drivers
v0xb4cddbf20_0 .var/s "sum", 39 0;
v0xb4cde0000_0 .net/s "w_bus", 511 0, L_0xb4d2605a0;  alias, 1 drivers
v0xb4cde00a0_0 .net/s "x_bus", 511 0, L_0xb4d260500;  alias, 1 drivers
E_0xb4d20e7c0/0 .event anyedge, v0xb4cddbf20_0, v0xb4cdc7700_0, v0xb4cdc7d40_0, v0xb4cdcc3c0_0;
E_0xb4d20e7c0/1 .event anyedge, v0xb4cdcca00_0, v0xb4cdcd040_0, v0xb4cdcd680_0, v0xb4cdcdcc0_0;
E_0xb4d20e7c0/2 .event anyedge, v0xb4cdce300_0, v0xb4cdce940_0, v0xb4cdcef80_0, v0xb4cdcf5c0_0;
E_0xb4d20e7c0/3 .event anyedge, v0xb4cdcfc00_0, v0xb4cdd0280_0, v0xb4cdd08c0_0, v0xb4cdd0f00_0;
E_0xb4d20e7c0/4 .event anyedge, v0xb4cdd1540_0, v0xb4cdd1b80_0, v0xb4cdd21c0_0, v0xb4cdd2800_0;
E_0xb4d20e7c0/5 .event anyedge, v0xb4cdd2e40_0, v0xb4cdd3480_0, v0xb4cdd3ac0_0, v0xb4cdd8140_0;
E_0xb4d20e7c0/6 .event anyedge, v0xb4cdd8780_0, v0xb4cdd8dc0_0, v0xb4cdd9400_0, v0xb4cdd9a40_0;
E_0xb4d20e7c0/7 .event anyedge, v0xb4cdda080_0, v0xb4cdda6c0_0, v0xb4cddad00_0, v0xb4cddb340_0;
E_0xb4d20e7c0/8 .event anyedge, v0xb4cddb980_0;
E_0xb4d20e7c0 .event/or E_0xb4d20e7c0/0, E_0xb4d20e7c0/1, E_0xb4d20e7c0/2, E_0xb4d20e7c0/3, E_0xb4d20e7c0/4, E_0xb4d20e7c0/5, E_0xb4d20e7c0/6, E_0xb4d20e7c0/7, E_0xb4d20e7c0/8;
L_0xb4d260780 .part L_0xb4d260500, 0, 16;
L_0xb4d260820 .part L_0xb4d2605a0, 0, 16;
L_0xb4d260a00 .part L_0xb4d260500, 16, 16;
L_0xb4d260aa0 .part L_0xb4d2605a0, 16, 16;
L_0xb4d260c80 .part L_0xb4d260500, 32, 16;
L_0xb4d260d20 .part L_0xb4d2605a0, 32, 16;
L_0xb4d260f00 .part L_0xb4d260500, 48, 16;
L_0xb4d260fa0 .part L_0xb4d2605a0, 48, 16;
L_0xb4d261180 .part L_0xb4d260500, 64, 16;
L_0xb4d261220 .part L_0xb4d2605a0, 64, 16;
L_0xb4d261400 .part L_0xb4d260500, 80, 16;
L_0xb4d2614a0 .part L_0xb4d2605a0, 80, 16;
L_0xb4d261680 .part L_0xb4d260500, 96, 16;
L_0xb4d261720 .part L_0xb4d2605a0, 96, 16;
L_0xb4d261900 .part L_0xb4d260500, 112, 16;
L_0xb4d2619a0 .part L_0xb4d2605a0, 112, 16;
L_0xb4d261b80 .part L_0xb4d260500, 128, 16;
L_0xb4d261cc0 .part L_0xb4d2605a0, 128, 16;
L_0xb4d261ea0 .part L_0xb4d260500, 144, 16;
L_0xb4d261f40 .part L_0xb4d2605a0, 144, 16;
L_0xb4d262120 .part L_0xb4d260500, 160, 16;
L_0xb4d261c20 .part L_0xb4d2605a0, 160, 16;
L_0xb4d262300 .part L_0xb4d260500, 176, 16;
L_0xb4d2623a0 .part L_0xb4d2605a0, 176, 16;
L_0xb4d262580 .part L_0xb4d260500, 192, 16;
L_0xb4d262620 .part L_0xb4d2605a0, 192, 16;
L_0xb4d262800 .part L_0xb4d260500, 208, 16;
L_0xb4d2628a0 .part L_0xb4d2605a0, 208, 16;
L_0xb4d262a80 .part L_0xb4d260500, 224, 16;
L_0xb4d262b20 .part L_0xb4d2605a0, 224, 16;
L_0xb4d262d00 .part L_0xb4d260500, 240, 16;
L_0xb4d262da0 .part L_0xb4d2605a0, 240, 16;
L_0xb4d262f80 .part L_0xb4d260500, 256, 16;
L_0xb4d263020 .part L_0xb4d2605a0, 256, 16;
L_0xb4d263200 .part L_0xb4d260500, 272, 16;
L_0xb4d2632a0 .part L_0xb4d2605a0, 272, 16;
L_0xb4d263480 .part L_0xb4d260500, 288, 16;
L_0xb4d263520 .part L_0xb4d2605a0, 288, 16;
L_0xb4d263700 .part L_0xb4d260500, 304, 16;
L_0xb4d2637a0 .part L_0xb4d2605a0, 304, 16;
L_0xb4d263980 .part L_0xb4d260500, 320, 16;
L_0xb4d263a20 .part L_0xb4d2605a0, 320, 16;
L_0xb4d263c00 .part L_0xb4d260500, 336, 16;
L_0xb4d263ca0 .part L_0xb4d2605a0, 336, 16;
L_0xb4d263e80 .part L_0xb4d260500, 352, 16;
L_0xb4d263f20 .part L_0xb4d2605a0, 352, 16;
L_0xb4d264140 .part L_0xb4d260500, 368, 16;
L_0xb4d2641e0 .part L_0xb4d2605a0, 368, 16;
L_0xb4d2643c0 .part L_0xb4d260500, 384, 16;
L_0xb4d264460 .part L_0xb4d2605a0, 384, 16;
L_0xb4d264640 .part L_0xb4d260500, 400, 16;
L_0xb4d2646e0 .part L_0xb4d2605a0, 400, 16;
L_0xb4d2648c0 .part L_0xb4d260500, 416, 16;
L_0xb4d264960 .part L_0xb4d2605a0, 416, 16;
L_0xb4d264b40 .part L_0xb4d260500, 432, 16;
L_0xb4d264be0 .part L_0xb4d2605a0, 432, 16;
L_0xb4d264dc0 .part L_0xb4d260500, 448, 16;
L_0xb4d264e60 .part L_0xb4d2605a0, 448, 16;
L_0xb4d265040 .part L_0xb4d260500, 464, 16;
L_0xb4d2650e0 .part L_0xb4d2605a0, 464, 16;
L_0xb4d2652c0 .part L_0xb4d260500, 480, 16;
L_0xb4d265360 .part L_0xb4d2605a0, 480, 16;
L_0xb4d265540 .part L_0xb4d260500, 496, 16;
L_0xb4d2655e0 .part L_0xb4d2605a0, 496, 16;
L_0xb4d253d40 .arith/sum 40, v0xb4cde0c80_0, v0xb4cddbf20_0;
S_0xb4d23ab80 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99680 .param/l "i" 1 6 17, +C4<00>;
S_0xb4d23ad00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d23ab80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc06c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc0700 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc0740 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdc73e0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdfed00;  1 drivers
v0xb4cdc7480_0 .net/s *"_ivl_2", 31 0, L_0xb4cdfeda0;  1 drivers
v0xb4cdc7520_0 .net *"_ivl_7", 0 0, L_0xb4d260640;  1 drivers
v0xb4cdc75c0_0 .net *"_ivl_9", 7 0, L_0xb4d2606e0;  1 drivers
L_0xb4c8562a8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdc7660_0 .net/s "acc_in", 39 0, L_0xb4c8562a8;  1 drivers
v0xb4cdc7700_0 .net/s "acc_out", 39 0, L_0xb4d252940;  alias, 1 drivers
v0xb4cdc77a0_0 .net/s "product", 31 0, L_0xb4cdfee40;  1 drivers
v0xb4cdc7840_0 .net/s "product_ext", 39 0, L_0xb4cdfeee0;  1 drivers
v0xb4cdc78e0_0 .net/s "w", 15 0, L_0xb4d260820;  1 drivers
v0xb4cdc7980_0 .net/s "x", 15 0, L_0xb4d260780;  1 drivers
L_0xb4cdfed00 .extend/s 32, L_0xb4d260780;
L_0xb4cdfeda0 .extend/s 32, L_0xb4d260820;
L_0xb4cdfee40 .arith/mult 32, L_0xb4cdfed00, L_0xb4cdfeda0;
L_0xb4d260640 .part L_0xb4cdfee40, 31, 1;
L_0xb4d2606e0 .repeat 8, 8, L_0xb4d260640;
L_0xb4cdfeee0 .concat [ 32 8 0 0], L_0xb4cdfee40, L_0xb4d2606e0;
L_0xb4d252940 .arith/sum 40, L_0xb4c8562a8, L_0xb4cdfeee0;
S_0xb4d23ae80 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd996c0 .param/l "i" 1 6 17, +C4<01>;
S_0xb4d23b000 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d23ae80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc0780 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc07c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc0800 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdc7a20_0 .net/s *"_ivl_0", 31 0, L_0xb4cdfef80;  1 drivers
v0xb4cdc7ac0_0 .net/s *"_ivl_2", 31 0, L_0xb4cdff020;  1 drivers
v0xb4cdc7b60_0 .net *"_ivl_7", 0 0, L_0xb4d2608c0;  1 drivers
v0xb4cdc7c00_0 .net *"_ivl_9", 7 0, L_0xb4d260960;  1 drivers
L_0xb4c8562f0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdc7ca0_0 .net/s "acc_in", 39 0, L_0xb4c8562f0;  1 drivers
v0xb4cdc7d40_0 .net/s "acc_out", 39 0, L_0xb4d2529e0;  alias, 1 drivers
v0xb4cdc7de0_0 .net/s "product", 31 0, L_0xb4cdff0c0;  1 drivers
v0xb4cdc7e80_0 .net/s "product_ext", 39 0, L_0xb4cdff160;  1 drivers
v0xb4cdc7f20_0 .net/s "w", 15 0, L_0xb4d260aa0;  1 drivers
v0xb4cdcc000_0 .net/s "x", 15 0, L_0xb4d260a00;  1 drivers
L_0xb4cdfef80 .extend/s 32, L_0xb4d260a00;
L_0xb4cdff020 .extend/s 32, L_0xb4d260aa0;
L_0xb4cdff0c0 .arith/mult 32, L_0xb4cdfef80, L_0xb4cdff020;
L_0xb4d2608c0 .part L_0xb4cdff0c0, 31, 1;
L_0xb4d260960 .repeat 8, 8, L_0xb4d2608c0;
L_0xb4cdff160 .concat [ 32 8 0 0], L_0xb4cdff0c0, L_0xb4d260960;
L_0xb4d2529e0 .arith/sum 40, L_0xb4c8562f0, L_0xb4cdff160;
S_0xb4d23b180 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99700 .param/l "i" 1 6 17, +C4<010>;
S_0xb4d23b300 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d23b180;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc0840 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc0880 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc08c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdcc0a0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdff200;  1 drivers
v0xb4cdcc140_0 .net/s *"_ivl_2", 31 0, L_0xb4cdff2a0;  1 drivers
v0xb4cdcc1e0_0 .net *"_ivl_7", 0 0, L_0xb4d260b40;  1 drivers
v0xb4cdcc280_0 .net *"_ivl_9", 7 0, L_0xb4d260be0;  1 drivers
L_0xb4c856338 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdcc320_0 .net/s "acc_in", 39 0, L_0xb4c856338;  1 drivers
v0xb4cdcc3c0_0 .net/s "acc_out", 39 0, L_0xb4d252a80;  alias, 1 drivers
v0xb4cdcc460_0 .net/s "product", 31 0, L_0xb4cdff340;  1 drivers
v0xb4cdcc500_0 .net/s "product_ext", 39 0, L_0xb4cdff3e0;  1 drivers
v0xb4cdcc5a0_0 .net/s "w", 15 0, L_0xb4d260d20;  1 drivers
v0xb4cdcc640_0 .net/s "x", 15 0, L_0xb4d260c80;  1 drivers
L_0xb4cdff200 .extend/s 32, L_0xb4d260c80;
L_0xb4cdff2a0 .extend/s 32, L_0xb4d260d20;
L_0xb4cdff340 .arith/mult 32, L_0xb4cdff200, L_0xb4cdff2a0;
L_0xb4d260b40 .part L_0xb4cdff340, 31, 1;
L_0xb4d260be0 .repeat 8, 8, L_0xb4d260b40;
L_0xb4cdff3e0 .concat [ 32 8 0 0], L_0xb4cdff340, L_0xb4d260be0;
L_0xb4d252a80 .arith/sum 40, L_0xb4c856338, L_0xb4cdff3e0;
S_0xb4d23b480 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99740 .param/l "i" 1 6 17, +C4<011>;
S_0xb4d23b600 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d23b480;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc0900 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc0940 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc0980 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdcc6e0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdff480;  1 drivers
v0xb4cdcc780_0 .net/s *"_ivl_2", 31 0, L_0xb4cdff520;  1 drivers
v0xb4cdcc820_0 .net *"_ivl_7", 0 0, L_0xb4d260dc0;  1 drivers
v0xb4cdcc8c0_0 .net *"_ivl_9", 7 0, L_0xb4d260e60;  1 drivers
L_0xb4c856380 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdcc960_0 .net/s "acc_in", 39 0, L_0xb4c856380;  1 drivers
v0xb4cdcca00_0 .net/s "acc_out", 39 0, L_0xb4d252b20;  alias, 1 drivers
v0xb4cdccaa0_0 .net/s "product", 31 0, L_0xb4cdff5c0;  1 drivers
v0xb4cdccb40_0 .net/s "product_ext", 39 0, L_0xb4cdff660;  1 drivers
v0xb4cdccbe0_0 .net/s "w", 15 0, L_0xb4d260fa0;  1 drivers
v0xb4cdccc80_0 .net/s "x", 15 0, L_0xb4d260f00;  1 drivers
L_0xb4cdff480 .extend/s 32, L_0xb4d260f00;
L_0xb4cdff520 .extend/s 32, L_0xb4d260fa0;
L_0xb4cdff5c0 .arith/mult 32, L_0xb4cdff480, L_0xb4cdff520;
L_0xb4d260dc0 .part L_0xb4cdff5c0, 31, 1;
L_0xb4d260e60 .repeat 8, 8, L_0xb4d260dc0;
L_0xb4cdff660 .concat [ 32 8 0 0], L_0xb4cdff5c0, L_0xb4d260e60;
L_0xb4d252b20 .arith/sum 40, L_0xb4c856380, L_0xb4cdff660;
S_0xb4d23b780 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99780 .param/l "i" 1 6 17, +C4<0100>;
S_0xb4d23b900 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d23b780;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc09c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc0a00 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc0a40 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdccd20_0 .net/s *"_ivl_0", 31 0, L_0xb4cdff700;  1 drivers
v0xb4cdccdc0_0 .net/s *"_ivl_2", 31 0, L_0xb4cdff7a0;  1 drivers
v0xb4cdcce60_0 .net *"_ivl_7", 0 0, L_0xb4d261040;  1 drivers
v0xb4cdccf00_0 .net *"_ivl_9", 7 0, L_0xb4d2610e0;  1 drivers
L_0xb4c8563c8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdccfa0_0 .net/s "acc_in", 39 0, L_0xb4c8563c8;  1 drivers
v0xb4cdcd040_0 .net/s "acc_out", 39 0, L_0xb4d252bc0;  alias, 1 drivers
v0xb4cdcd0e0_0 .net/s "product", 31 0, L_0xb4cdff840;  1 drivers
v0xb4cdcd180_0 .net/s "product_ext", 39 0, L_0xb4cdff8e0;  1 drivers
v0xb4cdcd220_0 .net/s "w", 15 0, L_0xb4d261220;  1 drivers
v0xb4cdcd2c0_0 .net/s "x", 15 0, L_0xb4d261180;  1 drivers
L_0xb4cdff700 .extend/s 32, L_0xb4d261180;
L_0xb4cdff7a0 .extend/s 32, L_0xb4d261220;
L_0xb4cdff840 .arith/mult 32, L_0xb4cdff700, L_0xb4cdff7a0;
L_0xb4d261040 .part L_0xb4cdff840, 31, 1;
L_0xb4d2610e0 .repeat 8, 8, L_0xb4d261040;
L_0xb4cdff8e0 .concat [ 32 8 0 0], L_0xb4cdff840, L_0xb4d2610e0;
L_0xb4d252bc0 .arith/sum 40, L_0xb4c8563c8, L_0xb4cdff8e0;
S_0xb4d23ba80 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd997c0 .param/l "i" 1 6 17, +C4<0101>;
S_0xb4d23bc00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d23ba80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc0a80 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc0ac0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc0b00 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdcd360_0 .net/s *"_ivl_0", 31 0, L_0xb4cdff980;  1 drivers
v0xb4cdcd400_0 .net/s *"_ivl_2", 31 0, L_0xb4cdffa20;  1 drivers
v0xb4cdcd4a0_0 .net *"_ivl_7", 0 0, L_0xb4d2612c0;  1 drivers
v0xb4cdcd540_0 .net *"_ivl_9", 7 0, L_0xb4d261360;  1 drivers
L_0xb4c856410 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdcd5e0_0 .net/s "acc_in", 39 0, L_0xb4c856410;  1 drivers
v0xb4cdcd680_0 .net/s "acc_out", 39 0, L_0xb4d252c60;  alias, 1 drivers
v0xb4cdcd720_0 .net/s "product", 31 0, L_0xb4cdffac0;  1 drivers
v0xb4cdcd7c0_0 .net/s "product_ext", 39 0, L_0xb4cdffb60;  1 drivers
v0xb4cdcd860_0 .net/s "w", 15 0, L_0xb4d2614a0;  1 drivers
v0xb4cdcd900_0 .net/s "x", 15 0, L_0xb4d261400;  1 drivers
L_0xb4cdff980 .extend/s 32, L_0xb4d261400;
L_0xb4cdffa20 .extend/s 32, L_0xb4d2614a0;
L_0xb4cdffac0 .arith/mult 32, L_0xb4cdff980, L_0xb4cdffa20;
L_0xb4d2612c0 .part L_0xb4cdffac0, 31, 1;
L_0xb4d261360 .repeat 8, 8, L_0xb4d2612c0;
L_0xb4cdffb60 .concat [ 32 8 0 0], L_0xb4cdffac0, L_0xb4d261360;
L_0xb4d252c60 .arith/sum 40, L_0xb4c856410, L_0xb4cdffb60;
S_0xb4d23bd80 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99800 .param/l "i" 1 6 17, +C4<0110>;
S_0xb4d240000 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d23bd80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc0b40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc0b80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc0bc0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdcd9a0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdffc00;  1 drivers
v0xb4cdcda40_0 .net/s *"_ivl_2", 31 0, L_0xb4cdffca0;  1 drivers
v0xb4cdcdae0_0 .net *"_ivl_7", 0 0, L_0xb4d261540;  1 drivers
v0xb4cdcdb80_0 .net *"_ivl_9", 7 0, L_0xb4d2615e0;  1 drivers
L_0xb4c856458 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdcdc20_0 .net/s "acc_in", 39 0, L_0xb4c856458;  1 drivers
v0xb4cdcdcc0_0 .net/s "acc_out", 39 0, L_0xb4d252d00;  alias, 1 drivers
v0xb4cdcdd60_0 .net/s "product", 31 0, L_0xb4cdffd40;  1 drivers
v0xb4cdcde00_0 .net/s "product_ext", 39 0, L_0xb4cdffde0;  1 drivers
v0xb4cdcdea0_0 .net/s "w", 15 0, L_0xb4d261720;  1 drivers
v0xb4cdcdf40_0 .net/s "x", 15 0, L_0xb4d261680;  1 drivers
L_0xb4cdffc00 .extend/s 32, L_0xb4d261680;
L_0xb4cdffca0 .extend/s 32, L_0xb4d261720;
L_0xb4cdffd40 .arith/mult 32, L_0xb4cdffc00, L_0xb4cdffca0;
L_0xb4d261540 .part L_0xb4cdffd40, 31, 1;
L_0xb4d2615e0 .repeat 8, 8, L_0xb4d261540;
L_0xb4cdffde0 .concat [ 32 8 0 0], L_0xb4cdffd40, L_0xb4d2615e0;
L_0xb4d252d00 .arith/sum 40, L_0xb4c856458, L_0xb4cdffde0;
S_0xb4d240180 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99840 .param/l "i" 1 6 17, +C4<0111>;
S_0xb4d240300 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d240180;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc0c00 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc0c40 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc0c80 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdcdfe0_0 .net/s *"_ivl_0", 31 0, L_0xb4cdffe80;  1 drivers
v0xb4cdce080_0 .net/s *"_ivl_2", 31 0, L_0xb4cdfff20;  1 drivers
v0xb4cdce120_0 .net *"_ivl_7", 0 0, L_0xb4d2617c0;  1 drivers
v0xb4cdce1c0_0 .net *"_ivl_9", 7 0, L_0xb4d261860;  1 drivers
L_0xb4c8564a0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdce260_0 .net/s "acc_in", 39 0, L_0xb4c8564a0;  1 drivers
v0xb4cdce300_0 .net/s "acc_out", 39 0, L_0xb4d252da0;  alias, 1 drivers
v0xb4cdce3a0_0 .net/s "product", 31 0, L_0xb4ce08000;  1 drivers
v0xb4cdce440_0 .net/s "product_ext", 39 0, L_0xb4ce080a0;  1 drivers
v0xb4cdce4e0_0 .net/s "w", 15 0, L_0xb4d2619a0;  1 drivers
v0xb4cdce580_0 .net/s "x", 15 0, L_0xb4d261900;  1 drivers
L_0xb4cdffe80 .extend/s 32, L_0xb4d261900;
L_0xb4cdfff20 .extend/s 32, L_0xb4d2619a0;
L_0xb4ce08000 .arith/mult 32, L_0xb4cdffe80, L_0xb4cdfff20;
L_0xb4d2617c0 .part L_0xb4ce08000, 31, 1;
L_0xb4d261860 .repeat 8, 8, L_0xb4d2617c0;
L_0xb4ce080a0 .concat [ 32 8 0 0], L_0xb4ce08000, L_0xb4d261860;
L_0xb4d252da0 .arith/sum 40, L_0xb4c8564a0, L_0xb4ce080a0;
S_0xb4d240480 .scope generate, "GEN_MAC[8]" "GEN_MAC[8]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99880 .param/l "i" 1 6 17, +C4<01000>;
S_0xb4d240600 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d240480;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc0cc0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc0d00 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc0d40 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdce620_0 .net/s *"_ivl_0", 31 0, L_0xb4ce08140;  1 drivers
v0xb4cdce6c0_0 .net/s *"_ivl_2", 31 0, L_0xb4ce081e0;  1 drivers
v0xb4cdce760_0 .net *"_ivl_7", 0 0, L_0xb4d261a40;  1 drivers
v0xb4cdce800_0 .net *"_ivl_9", 7 0, L_0xb4d261ae0;  1 drivers
L_0xb4c8564e8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdce8a0_0 .net/s "acc_in", 39 0, L_0xb4c8564e8;  1 drivers
v0xb4cdce940_0 .net/s "acc_out", 39 0, L_0xb4d252e40;  alias, 1 drivers
v0xb4cdce9e0_0 .net/s "product", 31 0, L_0xb4ce08280;  1 drivers
v0xb4cdcea80_0 .net/s "product_ext", 39 0, L_0xb4ce08320;  1 drivers
v0xb4cdceb20_0 .net/s "w", 15 0, L_0xb4d261cc0;  1 drivers
v0xb4cdcebc0_0 .net/s "x", 15 0, L_0xb4d261b80;  1 drivers
L_0xb4ce08140 .extend/s 32, L_0xb4d261b80;
L_0xb4ce081e0 .extend/s 32, L_0xb4d261cc0;
L_0xb4ce08280 .arith/mult 32, L_0xb4ce08140, L_0xb4ce081e0;
L_0xb4d261a40 .part L_0xb4ce08280, 31, 1;
L_0xb4d261ae0 .repeat 8, 8, L_0xb4d261a40;
L_0xb4ce08320 .concat [ 32 8 0 0], L_0xb4ce08280, L_0xb4d261ae0;
L_0xb4d252e40 .arith/sum 40, L_0xb4c8564e8, L_0xb4ce08320;
S_0xb4d240780 .scope generate, "GEN_MAC[9]" "GEN_MAC[9]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd998c0 .param/l "i" 1 6 17, +C4<01001>;
S_0xb4d240900 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d240780;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc0d80 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc0dc0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc0e00 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdcec60_0 .net/s *"_ivl_0", 31 0, L_0xb4ce083c0;  1 drivers
v0xb4cdced00_0 .net/s *"_ivl_2", 31 0, L_0xb4ce08460;  1 drivers
v0xb4cdceda0_0 .net *"_ivl_7", 0 0, L_0xb4d261d60;  1 drivers
v0xb4cdcee40_0 .net *"_ivl_9", 7 0, L_0xb4d261e00;  1 drivers
L_0xb4c856530 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdceee0_0 .net/s "acc_in", 39 0, L_0xb4c856530;  1 drivers
v0xb4cdcef80_0 .net/s "acc_out", 39 0, L_0xb4d252ee0;  alias, 1 drivers
v0xb4cdcf020_0 .net/s "product", 31 0, L_0xb4ce08500;  1 drivers
v0xb4cdcf0c0_0 .net/s "product_ext", 39 0, L_0xb4ce085a0;  1 drivers
v0xb4cdcf160_0 .net/s "w", 15 0, L_0xb4d261f40;  1 drivers
v0xb4cdcf200_0 .net/s "x", 15 0, L_0xb4d261ea0;  1 drivers
L_0xb4ce083c0 .extend/s 32, L_0xb4d261ea0;
L_0xb4ce08460 .extend/s 32, L_0xb4d261f40;
L_0xb4ce08500 .arith/mult 32, L_0xb4ce083c0, L_0xb4ce08460;
L_0xb4d261d60 .part L_0xb4ce08500, 31, 1;
L_0xb4d261e00 .repeat 8, 8, L_0xb4d261d60;
L_0xb4ce085a0 .concat [ 32 8 0 0], L_0xb4ce08500, L_0xb4d261e00;
L_0xb4d252ee0 .arith/sum 40, L_0xb4c856530, L_0xb4ce085a0;
S_0xb4d240a80 .scope generate, "GEN_MAC[10]" "GEN_MAC[10]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99900 .param/l "i" 1 6 17, +C4<01010>;
S_0xb4d240c00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d240a80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc0e40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc0e80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc0ec0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdcf2a0_0 .net/s *"_ivl_0", 31 0, L_0xb4ce08640;  1 drivers
v0xb4cdcf340_0 .net/s *"_ivl_2", 31 0, L_0xb4ce086e0;  1 drivers
v0xb4cdcf3e0_0 .net *"_ivl_7", 0 0, L_0xb4d261fe0;  1 drivers
v0xb4cdcf480_0 .net *"_ivl_9", 7 0, L_0xb4d262080;  1 drivers
L_0xb4c856578 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdcf520_0 .net/s "acc_in", 39 0, L_0xb4c856578;  1 drivers
v0xb4cdcf5c0_0 .net/s "acc_out", 39 0, L_0xb4d252f80;  alias, 1 drivers
v0xb4cdcf660_0 .net/s "product", 31 0, L_0xb4ce08780;  1 drivers
v0xb4cdcf700_0 .net/s "product_ext", 39 0, L_0xb4ce08820;  1 drivers
v0xb4cdcf7a0_0 .net/s "w", 15 0, L_0xb4d261c20;  1 drivers
v0xb4cdcf840_0 .net/s "x", 15 0, L_0xb4d262120;  1 drivers
L_0xb4ce08640 .extend/s 32, L_0xb4d262120;
L_0xb4ce086e0 .extend/s 32, L_0xb4d261c20;
L_0xb4ce08780 .arith/mult 32, L_0xb4ce08640, L_0xb4ce086e0;
L_0xb4d261fe0 .part L_0xb4ce08780, 31, 1;
L_0xb4d262080 .repeat 8, 8, L_0xb4d261fe0;
L_0xb4ce08820 .concat [ 32 8 0 0], L_0xb4ce08780, L_0xb4d262080;
L_0xb4d252f80 .arith/sum 40, L_0xb4c856578, L_0xb4ce08820;
S_0xb4d240d80 .scope generate, "GEN_MAC[11]" "GEN_MAC[11]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99940 .param/l "i" 1 6 17, +C4<01011>;
S_0xb4d240f00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d240d80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc0f00 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc0f40 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc0f80 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdcf8e0_0 .net/s *"_ivl_0", 31 0, L_0xb4ce088c0;  1 drivers
v0xb4cdcf980_0 .net/s *"_ivl_2", 31 0, L_0xb4ce08960;  1 drivers
v0xb4cdcfa20_0 .net *"_ivl_7", 0 0, L_0xb4d2621c0;  1 drivers
v0xb4cdcfac0_0 .net *"_ivl_9", 7 0, L_0xb4d262260;  1 drivers
L_0xb4c8565c0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdcfb60_0 .net/s "acc_in", 39 0, L_0xb4c8565c0;  1 drivers
v0xb4cdcfc00_0 .net/s "acc_out", 39 0, L_0xb4d253020;  alias, 1 drivers
v0xb4cdcfca0_0 .net/s "product", 31 0, L_0xb4ce08a00;  1 drivers
v0xb4cdcfd40_0 .net/s "product_ext", 39 0, L_0xb4ce08aa0;  1 drivers
v0xb4cdcfde0_0 .net/s "w", 15 0, L_0xb4d2623a0;  1 drivers
v0xb4cdcfe80_0 .net/s "x", 15 0, L_0xb4d262300;  1 drivers
L_0xb4ce088c0 .extend/s 32, L_0xb4d262300;
L_0xb4ce08960 .extend/s 32, L_0xb4d2623a0;
L_0xb4ce08a00 .arith/mult 32, L_0xb4ce088c0, L_0xb4ce08960;
L_0xb4d2621c0 .part L_0xb4ce08a00, 31, 1;
L_0xb4d262260 .repeat 8, 8, L_0xb4d2621c0;
L_0xb4ce08aa0 .concat [ 32 8 0 0], L_0xb4ce08a00, L_0xb4d262260;
L_0xb4d253020 .arith/sum 40, L_0xb4c8565c0, L_0xb4ce08aa0;
S_0xb4d241080 .scope generate, "GEN_MAC[12]" "GEN_MAC[12]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99980 .param/l "i" 1 6 17, +C4<01100>;
S_0xb4d241200 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d241080;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc0fc0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc1000 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc1040 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdcff20_0 .net/s *"_ivl_0", 31 0, L_0xb4ce08b40;  1 drivers
v0xb4cdd0000_0 .net/s *"_ivl_2", 31 0, L_0xb4ce08be0;  1 drivers
v0xb4cdd00a0_0 .net *"_ivl_7", 0 0, L_0xb4d262440;  1 drivers
v0xb4cdd0140_0 .net *"_ivl_9", 7 0, L_0xb4d2624e0;  1 drivers
L_0xb4c856608 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdd01e0_0 .net/s "acc_in", 39 0, L_0xb4c856608;  1 drivers
v0xb4cdd0280_0 .net/s "acc_out", 39 0, L_0xb4d2530c0;  alias, 1 drivers
v0xb4cdd0320_0 .net/s "product", 31 0, L_0xb4ce08c80;  1 drivers
v0xb4cdd03c0_0 .net/s "product_ext", 39 0, L_0xb4ce08d20;  1 drivers
v0xb4cdd0460_0 .net/s "w", 15 0, L_0xb4d262620;  1 drivers
v0xb4cdd0500_0 .net/s "x", 15 0, L_0xb4d262580;  1 drivers
L_0xb4ce08b40 .extend/s 32, L_0xb4d262580;
L_0xb4ce08be0 .extend/s 32, L_0xb4d262620;
L_0xb4ce08c80 .arith/mult 32, L_0xb4ce08b40, L_0xb4ce08be0;
L_0xb4d262440 .part L_0xb4ce08c80, 31, 1;
L_0xb4d2624e0 .repeat 8, 8, L_0xb4d262440;
L_0xb4ce08d20 .concat [ 32 8 0 0], L_0xb4ce08c80, L_0xb4d2624e0;
L_0xb4d2530c0 .arith/sum 40, L_0xb4c856608, L_0xb4ce08d20;
S_0xb4d241380 .scope generate, "GEN_MAC[13]" "GEN_MAC[13]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd999c0 .param/l "i" 1 6 17, +C4<01101>;
S_0xb4d241500 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d241380;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc1080 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc10c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc1100 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdd05a0_0 .net/s *"_ivl_0", 31 0, L_0xb4ce08dc0;  1 drivers
v0xb4cdd0640_0 .net/s *"_ivl_2", 31 0, L_0xb4ce08e60;  1 drivers
v0xb4cdd06e0_0 .net *"_ivl_7", 0 0, L_0xb4d2626c0;  1 drivers
v0xb4cdd0780_0 .net *"_ivl_9", 7 0, L_0xb4d262760;  1 drivers
L_0xb4c856650 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdd0820_0 .net/s "acc_in", 39 0, L_0xb4c856650;  1 drivers
v0xb4cdd08c0_0 .net/s "acc_out", 39 0, L_0xb4d253160;  alias, 1 drivers
v0xb4cdd0960_0 .net/s "product", 31 0, L_0xb4ce08f00;  1 drivers
v0xb4cdd0a00_0 .net/s "product_ext", 39 0, L_0xb4ce08fa0;  1 drivers
v0xb4cdd0aa0_0 .net/s "w", 15 0, L_0xb4d2628a0;  1 drivers
v0xb4cdd0b40_0 .net/s "x", 15 0, L_0xb4d262800;  1 drivers
L_0xb4ce08dc0 .extend/s 32, L_0xb4d262800;
L_0xb4ce08e60 .extend/s 32, L_0xb4d2628a0;
L_0xb4ce08f00 .arith/mult 32, L_0xb4ce08dc0, L_0xb4ce08e60;
L_0xb4d2626c0 .part L_0xb4ce08f00, 31, 1;
L_0xb4d262760 .repeat 8, 8, L_0xb4d2626c0;
L_0xb4ce08fa0 .concat [ 32 8 0 0], L_0xb4ce08f00, L_0xb4d262760;
L_0xb4d253160 .arith/sum 40, L_0xb4c856650, L_0xb4ce08fa0;
S_0xb4d241680 .scope generate, "GEN_MAC[14]" "GEN_MAC[14]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99a00 .param/l "i" 1 6 17, +C4<01110>;
S_0xb4d241800 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d241680;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc1140 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc1180 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc11c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdd0be0_0 .net/s *"_ivl_0", 31 0, L_0xb4ce09040;  1 drivers
v0xb4cdd0c80_0 .net/s *"_ivl_2", 31 0, L_0xb4ce090e0;  1 drivers
v0xb4cdd0d20_0 .net *"_ivl_7", 0 0, L_0xb4d262940;  1 drivers
v0xb4cdd0dc0_0 .net *"_ivl_9", 7 0, L_0xb4d2629e0;  1 drivers
L_0xb4c856698 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdd0e60_0 .net/s "acc_in", 39 0, L_0xb4c856698;  1 drivers
v0xb4cdd0f00_0 .net/s "acc_out", 39 0, L_0xb4d253200;  alias, 1 drivers
v0xb4cdd0fa0_0 .net/s "product", 31 0, L_0xb4ce09180;  1 drivers
v0xb4cdd1040_0 .net/s "product_ext", 39 0, L_0xb4ce09220;  1 drivers
v0xb4cdd10e0_0 .net/s "w", 15 0, L_0xb4d262b20;  1 drivers
v0xb4cdd1180_0 .net/s "x", 15 0, L_0xb4d262a80;  1 drivers
L_0xb4ce09040 .extend/s 32, L_0xb4d262a80;
L_0xb4ce090e0 .extend/s 32, L_0xb4d262b20;
L_0xb4ce09180 .arith/mult 32, L_0xb4ce09040, L_0xb4ce090e0;
L_0xb4d262940 .part L_0xb4ce09180, 31, 1;
L_0xb4d2629e0 .repeat 8, 8, L_0xb4d262940;
L_0xb4ce09220 .concat [ 32 8 0 0], L_0xb4ce09180, L_0xb4d2629e0;
L_0xb4d253200 .arith/sum 40, L_0xb4c856698, L_0xb4ce09220;
S_0xb4d241980 .scope generate, "GEN_MAC[15]" "GEN_MAC[15]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99a40 .param/l "i" 1 6 17, +C4<01111>;
S_0xb4d241b00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d241980;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc1200 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc1240 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc1280 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdd1220_0 .net/s *"_ivl_0", 31 0, L_0xb4ce092c0;  1 drivers
v0xb4cdd12c0_0 .net/s *"_ivl_2", 31 0, L_0xb4ce09360;  1 drivers
v0xb4cdd1360_0 .net *"_ivl_7", 0 0, L_0xb4d262bc0;  1 drivers
v0xb4cdd1400_0 .net *"_ivl_9", 7 0, L_0xb4d262c60;  1 drivers
L_0xb4c8566e0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdd14a0_0 .net/s "acc_in", 39 0, L_0xb4c8566e0;  1 drivers
v0xb4cdd1540_0 .net/s "acc_out", 39 0, L_0xb4d2532a0;  alias, 1 drivers
v0xb4cdd15e0_0 .net/s "product", 31 0, L_0xb4ce09400;  1 drivers
v0xb4cdd1680_0 .net/s "product_ext", 39 0, L_0xb4ce094a0;  1 drivers
v0xb4cdd1720_0 .net/s "w", 15 0, L_0xb4d262da0;  1 drivers
v0xb4cdd17c0_0 .net/s "x", 15 0, L_0xb4d262d00;  1 drivers
L_0xb4ce092c0 .extend/s 32, L_0xb4d262d00;
L_0xb4ce09360 .extend/s 32, L_0xb4d262da0;
L_0xb4ce09400 .arith/mult 32, L_0xb4ce092c0, L_0xb4ce09360;
L_0xb4d262bc0 .part L_0xb4ce09400, 31, 1;
L_0xb4d262c60 .repeat 8, 8, L_0xb4d262bc0;
L_0xb4ce094a0 .concat [ 32 8 0 0], L_0xb4ce09400, L_0xb4d262c60;
L_0xb4d2532a0 .arith/sum 40, L_0xb4c8566e0, L_0xb4ce094a0;
S_0xb4d241c80 .scope generate, "GEN_MAC[16]" "GEN_MAC[16]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99a80 .param/l "i" 1 6 17, +C4<010000>;
S_0xb4d241e00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d241c80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc12c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc1300 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc1340 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdd1860_0 .net/s *"_ivl_0", 31 0, L_0xb4ce09540;  1 drivers
v0xb4cdd1900_0 .net/s *"_ivl_2", 31 0, L_0xb4ce095e0;  1 drivers
v0xb4cdd19a0_0 .net *"_ivl_7", 0 0, L_0xb4d262e40;  1 drivers
v0xb4cdd1a40_0 .net *"_ivl_9", 7 0, L_0xb4d262ee0;  1 drivers
L_0xb4c856728 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdd1ae0_0 .net/s "acc_in", 39 0, L_0xb4c856728;  1 drivers
v0xb4cdd1b80_0 .net/s "acc_out", 39 0, L_0xb4d253340;  alias, 1 drivers
v0xb4cdd1c20_0 .net/s "product", 31 0, L_0xb4ce09680;  1 drivers
v0xb4cdd1cc0_0 .net/s "product_ext", 39 0, L_0xb4ce09720;  1 drivers
v0xb4cdd1d60_0 .net/s "w", 15 0, L_0xb4d263020;  1 drivers
v0xb4cdd1e00_0 .net/s "x", 15 0, L_0xb4d262f80;  1 drivers
L_0xb4ce09540 .extend/s 32, L_0xb4d262f80;
L_0xb4ce095e0 .extend/s 32, L_0xb4d263020;
L_0xb4ce09680 .arith/mult 32, L_0xb4ce09540, L_0xb4ce095e0;
L_0xb4d262e40 .part L_0xb4ce09680, 31, 1;
L_0xb4d262ee0 .repeat 8, 8, L_0xb4d262e40;
L_0xb4ce09720 .concat [ 32 8 0 0], L_0xb4ce09680, L_0xb4d262ee0;
L_0xb4d253340 .arith/sum 40, L_0xb4c856728, L_0xb4ce09720;
S_0xb4d241f80 .scope generate, "GEN_MAC[17]" "GEN_MAC[17]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99ac0 .param/l "i" 1 6 17, +C4<010001>;
S_0xb4d242100 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d241f80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc1380 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc13c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc1400 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdd1ea0_0 .net/s *"_ivl_0", 31 0, L_0xb4ce097c0;  1 drivers
v0xb4cdd1f40_0 .net/s *"_ivl_2", 31 0, L_0xb4ce09860;  1 drivers
v0xb4cdd1fe0_0 .net *"_ivl_7", 0 0, L_0xb4d2630c0;  1 drivers
v0xb4cdd2080_0 .net *"_ivl_9", 7 0, L_0xb4d263160;  1 drivers
L_0xb4c856770 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdd2120_0 .net/s "acc_in", 39 0, L_0xb4c856770;  1 drivers
v0xb4cdd21c0_0 .net/s "acc_out", 39 0, L_0xb4d2533e0;  alias, 1 drivers
v0xb4cdd2260_0 .net/s "product", 31 0, L_0xb4ce09900;  1 drivers
v0xb4cdd2300_0 .net/s "product_ext", 39 0, L_0xb4ce099a0;  1 drivers
v0xb4cdd23a0_0 .net/s "w", 15 0, L_0xb4d2632a0;  1 drivers
v0xb4cdd2440_0 .net/s "x", 15 0, L_0xb4d263200;  1 drivers
L_0xb4ce097c0 .extend/s 32, L_0xb4d263200;
L_0xb4ce09860 .extend/s 32, L_0xb4d2632a0;
L_0xb4ce09900 .arith/mult 32, L_0xb4ce097c0, L_0xb4ce09860;
L_0xb4d2630c0 .part L_0xb4ce09900, 31, 1;
L_0xb4d263160 .repeat 8, 8, L_0xb4d2630c0;
L_0xb4ce099a0 .concat [ 32 8 0 0], L_0xb4ce09900, L_0xb4d263160;
L_0xb4d2533e0 .arith/sum 40, L_0xb4c856770, L_0xb4ce099a0;
S_0xb4d242280 .scope generate, "GEN_MAC[18]" "GEN_MAC[18]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99b00 .param/l "i" 1 6 17, +C4<010010>;
S_0xb4d242400 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d242280;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc1440 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc1480 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc14c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdd24e0_0 .net/s *"_ivl_0", 31 0, L_0xb4ce09a40;  1 drivers
v0xb4cdd2580_0 .net/s *"_ivl_2", 31 0, L_0xb4ce09ae0;  1 drivers
v0xb4cdd2620_0 .net *"_ivl_7", 0 0, L_0xb4d263340;  1 drivers
v0xb4cdd26c0_0 .net *"_ivl_9", 7 0, L_0xb4d2633e0;  1 drivers
L_0xb4c8567b8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdd2760_0 .net/s "acc_in", 39 0, L_0xb4c8567b8;  1 drivers
v0xb4cdd2800_0 .net/s "acc_out", 39 0, L_0xb4d253480;  alias, 1 drivers
v0xb4cdd28a0_0 .net/s "product", 31 0, L_0xb4ce09b80;  1 drivers
v0xb4cdd2940_0 .net/s "product_ext", 39 0, L_0xb4ce09c20;  1 drivers
v0xb4cdd29e0_0 .net/s "w", 15 0, L_0xb4d263520;  1 drivers
v0xb4cdd2a80_0 .net/s "x", 15 0, L_0xb4d263480;  1 drivers
L_0xb4ce09a40 .extend/s 32, L_0xb4d263480;
L_0xb4ce09ae0 .extend/s 32, L_0xb4d263520;
L_0xb4ce09b80 .arith/mult 32, L_0xb4ce09a40, L_0xb4ce09ae0;
L_0xb4d263340 .part L_0xb4ce09b80, 31, 1;
L_0xb4d2633e0 .repeat 8, 8, L_0xb4d263340;
L_0xb4ce09c20 .concat [ 32 8 0 0], L_0xb4ce09b80, L_0xb4d2633e0;
L_0xb4d253480 .arith/sum 40, L_0xb4c8567b8, L_0xb4ce09c20;
S_0xb4d242580 .scope generate, "GEN_MAC[19]" "GEN_MAC[19]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99b40 .param/l "i" 1 6 17, +C4<010011>;
S_0xb4d242700 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d242580;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc1500 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc1540 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc1580 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdd2b20_0 .net/s *"_ivl_0", 31 0, L_0xb4ce09cc0;  1 drivers
v0xb4cdd2bc0_0 .net/s *"_ivl_2", 31 0, L_0xb4ce09d60;  1 drivers
v0xb4cdd2c60_0 .net *"_ivl_7", 0 0, L_0xb4d2635c0;  1 drivers
v0xb4cdd2d00_0 .net *"_ivl_9", 7 0, L_0xb4d263660;  1 drivers
L_0xb4c856800 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdd2da0_0 .net/s "acc_in", 39 0, L_0xb4c856800;  1 drivers
v0xb4cdd2e40_0 .net/s "acc_out", 39 0, L_0xb4d253520;  alias, 1 drivers
v0xb4cdd2ee0_0 .net/s "product", 31 0, L_0xb4ce09e00;  1 drivers
v0xb4cdd2f80_0 .net/s "product_ext", 39 0, L_0xb4ce09ea0;  1 drivers
v0xb4cdd3020_0 .net/s "w", 15 0, L_0xb4d2637a0;  1 drivers
v0xb4cdd30c0_0 .net/s "x", 15 0, L_0xb4d263700;  1 drivers
L_0xb4ce09cc0 .extend/s 32, L_0xb4d263700;
L_0xb4ce09d60 .extend/s 32, L_0xb4d2637a0;
L_0xb4ce09e00 .arith/mult 32, L_0xb4ce09cc0, L_0xb4ce09d60;
L_0xb4d2635c0 .part L_0xb4ce09e00, 31, 1;
L_0xb4d263660 .repeat 8, 8, L_0xb4d2635c0;
L_0xb4ce09ea0 .concat [ 32 8 0 0], L_0xb4ce09e00, L_0xb4d263660;
L_0xb4d253520 .arith/sum 40, L_0xb4c856800, L_0xb4ce09ea0;
S_0xb4d242880 .scope generate, "GEN_MAC[20]" "GEN_MAC[20]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99b80 .param/l "i" 1 6 17, +C4<010100>;
S_0xb4d242a00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d242880;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc15c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc1600 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc1640 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdd3160_0 .net/s *"_ivl_0", 31 0, L_0xb4ce09f40;  1 drivers
v0xb4cdd3200_0 .net/s *"_ivl_2", 31 0, L_0xb4ce09fe0;  1 drivers
v0xb4cdd32a0_0 .net *"_ivl_7", 0 0, L_0xb4d263840;  1 drivers
v0xb4cdd3340_0 .net *"_ivl_9", 7 0, L_0xb4d2638e0;  1 drivers
L_0xb4c856848 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdd33e0_0 .net/s "acc_in", 39 0, L_0xb4c856848;  1 drivers
v0xb4cdd3480_0 .net/s "acc_out", 39 0, L_0xb4d2535c0;  alias, 1 drivers
v0xb4cdd3520_0 .net/s "product", 31 0, L_0xb4ce0a080;  1 drivers
v0xb4cdd35c0_0 .net/s "product_ext", 39 0, L_0xb4ce0a120;  1 drivers
v0xb4cdd3660_0 .net/s "w", 15 0, L_0xb4d263a20;  1 drivers
v0xb4cdd3700_0 .net/s "x", 15 0, L_0xb4d263980;  1 drivers
L_0xb4ce09f40 .extend/s 32, L_0xb4d263980;
L_0xb4ce09fe0 .extend/s 32, L_0xb4d263a20;
L_0xb4ce0a080 .arith/mult 32, L_0xb4ce09f40, L_0xb4ce09fe0;
L_0xb4d263840 .part L_0xb4ce0a080, 31, 1;
L_0xb4d2638e0 .repeat 8, 8, L_0xb4d263840;
L_0xb4ce0a120 .concat [ 32 8 0 0], L_0xb4ce0a080, L_0xb4d2638e0;
L_0xb4d2535c0 .arith/sum 40, L_0xb4c856848, L_0xb4ce0a120;
S_0xb4d242b80 .scope generate, "GEN_MAC[21]" "GEN_MAC[21]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99bc0 .param/l "i" 1 6 17, +C4<010101>;
S_0xb4d242d00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d242b80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc1680 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc16c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc1700 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdd37a0_0 .net/s *"_ivl_0", 31 0, L_0xb4ce0a1c0;  1 drivers
v0xb4cdd3840_0 .net/s *"_ivl_2", 31 0, L_0xb4ce0a260;  1 drivers
v0xb4cdd38e0_0 .net *"_ivl_7", 0 0, L_0xb4d263ac0;  1 drivers
v0xb4cdd3980_0 .net *"_ivl_9", 7 0, L_0xb4d263b60;  1 drivers
L_0xb4c856890 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdd3a20_0 .net/s "acc_in", 39 0, L_0xb4c856890;  1 drivers
v0xb4cdd3ac0_0 .net/s "acc_out", 39 0, L_0xb4d253660;  alias, 1 drivers
v0xb4cdd3b60_0 .net/s "product", 31 0, L_0xb4ce0a300;  1 drivers
v0xb4cdd3c00_0 .net/s "product_ext", 39 0, L_0xb4ce0a3a0;  1 drivers
v0xb4cdd3ca0_0 .net/s "w", 15 0, L_0xb4d263ca0;  1 drivers
v0xb4cdd3d40_0 .net/s "x", 15 0, L_0xb4d263c00;  1 drivers
L_0xb4ce0a1c0 .extend/s 32, L_0xb4d263c00;
L_0xb4ce0a260 .extend/s 32, L_0xb4d263ca0;
L_0xb4ce0a300 .arith/mult 32, L_0xb4ce0a1c0, L_0xb4ce0a260;
L_0xb4d263ac0 .part L_0xb4ce0a300, 31, 1;
L_0xb4d263b60 .repeat 8, 8, L_0xb4d263ac0;
L_0xb4ce0a3a0 .concat [ 32 8 0 0], L_0xb4ce0a300, L_0xb4d263b60;
L_0xb4d253660 .arith/sum 40, L_0xb4c856890, L_0xb4ce0a3a0;
S_0xb4d242e80 .scope generate, "GEN_MAC[22]" "GEN_MAC[22]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99c00 .param/l "i" 1 6 17, +C4<010110>;
S_0xb4d243000 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d242e80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc1740 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc1780 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc17c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdd3de0_0 .net/s *"_ivl_0", 31 0, L_0xb4ce0a440;  1 drivers
v0xb4cdd3e80_0 .net/s *"_ivl_2", 31 0, L_0xb4ce0a4e0;  1 drivers
v0xb4cdd3f20_0 .net *"_ivl_7", 0 0, L_0xb4d263d40;  1 drivers
v0xb4cdd8000_0 .net *"_ivl_9", 7 0, L_0xb4d263de0;  1 drivers
L_0xb4c8568d8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdd80a0_0 .net/s "acc_in", 39 0, L_0xb4c8568d8;  1 drivers
v0xb4cdd8140_0 .net/s "acc_out", 39 0, L_0xb4d253700;  alias, 1 drivers
v0xb4cdd81e0_0 .net/s "product", 31 0, L_0xb4ce0a580;  1 drivers
v0xb4cdd8280_0 .net/s "product_ext", 39 0, L_0xb4ce0a620;  1 drivers
v0xb4cdd8320_0 .net/s "w", 15 0, L_0xb4d263f20;  1 drivers
v0xb4cdd83c0_0 .net/s "x", 15 0, L_0xb4d263e80;  1 drivers
L_0xb4ce0a440 .extend/s 32, L_0xb4d263e80;
L_0xb4ce0a4e0 .extend/s 32, L_0xb4d263f20;
L_0xb4ce0a580 .arith/mult 32, L_0xb4ce0a440, L_0xb4ce0a4e0;
L_0xb4d263d40 .part L_0xb4ce0a580, 31, 1;
L_0xb4d263de0 .repeat 8, 8, L_0xb4d263d40;
L_0xb4ce0a620 .concat [ 32 8 0 0], L_0xb4ce0a580, L_0xb4d263de0;
L_0xb4d253700 .arith/sum 40, L_0xb4c8568d8, L_0xb4ce0a620;
S_0xb4d243180 .scope generate, "GEN_MAC[23]" "GEN_MAC[23]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99c40 .param/l "i" 1 6 17, +C4<010111>;
S_0xb4d243300 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d243180;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc1800 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc1840 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc1880 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdd8460_0 .net/s *"_ivl_0", 31 0, L_0xb4ce0a6c0;  1 drivers
v0xb4cdd8500_0 .net/s *"_ivl_2", 31 0, L_0xb4ce0a760;  1 drivers
v0xb4cdd85a0_0 .net *"_ivl_7", 0 0, L_0xb4d264000;  1 drivers
v0xb4cdd8640_0 .net *"_ivl_9", 7 0, L_0xb4d2640a0;  1 drivers
L_0xb4c856920 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdd86e0_0 .net/s "acc_in", 39 0, L_0xb4c856920;  1 drivers
v0xb4cdd8780_0 .net/s "acc_out", 39 0, L_0xb4d2537a0;  alias, 1 drivers
v0xb4cdd8820_0 .net/s "product", 31 0, L_0xb4ce0a800;  1 drivers
v0xb4cdd88c0_0 .net/s "product_ext", 39 0, L_0xb4ce0a8a0;  1 drivers
v0xb4cdd8960_0 .net/s "w", 15 0, L_0xb4d2641e0;  1 drivers
v0xb4cdd8a00_0 .net/s "x", 15 0, L_0xb4d264140;  1 drivers
L_0xb4ce0a6c0 .extend/s 32, L_0xb4d264140;
L_0xb4ce0a760 .extend/s 32, L_0xb4d2641e0;
L_0xb4ce0a800 .arith/mult 32, L_0xb4ce0a6c0, L_0xb4ce0a760;
L_0xb4d264000 .part L_0xb4ce0a800, 31, 1;
L_0xb4d2640a0 .repeat 8, 8, L_0xb4d264000;
L_0xb4ce0a8a0 .concat [ 32 8 0 0], L_0xb4ce0a800, L_0xb4d2640a0;
L_0xb4d2537a0 .arith/sum 40, L_0xb4c856920, L_0xb4ce0a8a0;
S_0xb4d243480 .scope generate, "GEN_MAC[24]" "GEN_MAC[24]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99c80 .param/l "i" 1 6 17, +C4<011000>;
S_0xb4d243600 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d243480;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc18c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc1900 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc1940 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdd8aa0_0 .net/s *"_ivl_0", 31 0, L_0xb4ce0a940;  1 drivers
v0xb4cdd8b40_0 .net/s *"_ivl_2", 31 0, L_0xb4ce0a9e0;  1 drivers
v0xb4cdd8be0_0 .net *"_ivl_7", 0 0, L_0xb4d264280;  1 drivers
v0xb4cdd8c80_0 .net *"_ivl_9", 7 0, L_0xb4d264320;  1 drivers
L_0xb4c856968 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdd8d20_0 .net/s "acc_in", 39 0, L_0xb4c856968;  1 drivers
v0xb4cdd8dc0_0 .net/s "acc_out", 39 0, L_0xb4d253840;  alias, 1 drivers
v0xb4cdd8e60_0 .net/s "product", 31 0, L_0xb4ce0aa80;  1 drivers
v0xb4cdd8f00_0 .net/s "product_ext", 39 0, L_0xb4ce0ab20;  1 drivers
v0xb4cdd8fa0_0 .net/s "w", 15 0, L_0xb4d264460;  1 drivers
v0xb4cdd9040_0 .net/s "x", 15 0, L_0xb4d2643c0;  1 drivers
L_0xb4ce0a940 .extend/s 32, L_0xb4d2643c0;
L_0xb4ce0a9e0 .extend/s 32, L_0xb4d264460;
L_0xb4ce0aa80 .arith/mult 32, L_0xb4ce0a940, L_0xb4ce0a9e0;
L_0xb4d264280 .part L_0xb4ce0aa80, 31, 1;
L_0xb4d264320 .repeat 8, 8, L_0xb4d264280;
L_0xb4ce0ab20 .concat [ 32 8 0 0], L_0xb4ce0aa80, L_0xb4d264320;
L_0xb4d253840 .arith/sum 40, L_0xb4c856968, L_0xb4ce0ab20;
S_0xb4d243780 .scope generate, "GEN_MAC[25]" "GEN_MAC[25]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99cc0 .param/l "i" 1 6 17, +C4<011001>;
S_0xb4d243900 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d243780;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc1980 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc19c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc1a00 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdd90e0_0 .net/s *"_ivl_0", 31 0, L_0xb4ce0abc0;  1 drivers
v0xb4cdd9180_0 .net/s *"_ivl_2", 31 0, L_0xb4ce0ac60;  1 drivers
v0xb4cdd9220_0 .net *"_ivl_7", 0 0, L_0xb4d264500;  1 drivers
v0xb4cdd92c0_0 .net *"_ivl_9", 7 0, L_0xb4d2645a0;  1 drivers
L_0xb4c8569b0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdd9360_0 .net/s "acc_in", 39 0, L_0xb4c8569b0;  1 drivers
v0xb4cdd9400_0 .net/s "acc_out", 39 0, L_0xb4d2538e0;  alias, 1 drivers
v0xb4cdd94a0_0 .net/s "product", 31 0, L_0xb4ce0ad00;  1 drivers
v0xb4cdd9540_0 .net/s "product_ext", 39 0, L_0xb4ce0ada0;  1 drivers
v0xb4cdd95e0_0 .net/s "w", 15 0, L_0xb4d2646e0;  1 drivers
v0xb4cdd9680_0 .net/s "x", 15 0, L_0xb4d264640;  1 drivers
L_0xb4ce0abc0 .extend/s 32, L_0xb4d264640;
L_0xb4ce0ac60 .extend/s 32, L_0xb4d2646e0;
L_0xb4ce0ad00 .arith/mult 32, L_0xb4ce0abc0, L_0xb4ce0ac60;
L_0xb4d264500 .part L_0xb4ce0ad00, 31, 1;
L_0xb4d2645a0 .repeat 8, 8, L_0xb4d264500;
L_0xb4ce0ada0 .concat [ 32 8 0 0], L_0xb4ce0ad00, L_0xb4d2645a0;
L_0xb4d2538e0 .arith/sum 40, L_0xb4c8569b0, L_0xb4ce0ada0;
S_0xb4d243a80 .scope generate, "GEN_MAC[26]" "GEN_MAC[26]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99d00 .param/l "i" 1 6 17, +C4<011010>;
S_0xb4d243c00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d243a80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc1a40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc1a80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc1ac0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdd9720_0 .net/s *"_ivl_0", 31 0, L_0xb4ce0ae40;  1 drivers
v0xb4cdd97c0_0 .net/s *"_ivl_2", 31 0, L_0xb4ce0aee0;  1 drivers
v0xb4cdd9860_0 .net *"_ivl_7", 0 0, L_0xb4d264780;  1 drivers
v0xb4cdd9900_0 .net *"_ivl_9", 7 0, L_0xb4d264820;  1 drivers
L_0xb4c8569f8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdd99a0_0 .net/s "acc_in", 39 0, L_0xb4c8569f8;  1 drivers
v0xb4cdd9a40_0 .net/s "acc_out", 39 0, L_0xb4d253980;  alias, 1 drivers
v0xb4cdd9ae0_0 .net/s "product", 31 0, L_0xb4ce0af80;  1 drivers
v0xb4cdd9b80_0 .net/s "product_ext", 39 0, L_0xb4ce0b020;  1 drivers
v0xb4cdd9c20_0 .net/s "w", 15 0, L_0xb4d264960;  1 drivers
v0xb4cdd9cc0_0 .net/s "x", 15 0, L_0xb4d2648c0;  1 drivers
L_0xb4ce0ae40 .extend/s 32, L_0xb4d2648c0;
L_0xb4ce0aee0 .extend/s 32, L_0xb4d264960;
L_0xb4ce0af80 .arith/mult 32, L_0xb4ce0ae40, L_0xb4ce0aee0;
L_0xb4d264780 .part L_0xb4ce0af80, 31, 1;
L_0xb4d264820 .repeat 8, 8, L_0xb4d264780;
L_0xb4ce0b020 .concat [ 32 8 0 0], L_0xb4ce0af80, L_0xb4d264820;
L_0xb4d253980 .arith/sum 40, L_0xb4c8569f8, L_0xb4ce0b020;
S_0xb4d243d80 .scope generate, "GEN_MAC[27]" "GEN_MAC[27]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99d40 .param/l "i" 1 6 17, +C4<011011>;
S_0xb4d248000 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d243d80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc1b00 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc1b40 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc1b80 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdd9d60_0 .net/s *"_ivl_0", 31 0, L_0xb4ce0b0c0;  1 drivers
v0xb4cdd9e00_0 .net/s *"_ivl_2", 31 0, L_0xb4ce0b160;  1 drivers
v0xb4cdd9ea0_0 .net *"_ivl_7", 0 0, L_0xb4d264a00;  1 drivers
v0xb4cdd9f40_0 .net *"_ivl_9", 7 0, L_0xb4d264aa0;  1 drivers
L_0xb4c856a40 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdd9fe0_0 .net/s "acc_in", 39 0, L_0xb4c856a40;  1 drivers
v0xb4cdda080_0 .net/s "acc_out", 39 0, L_0xb4d253a20;  alias, 1 drivers
v0xb4cdda120_0 .net/s "product", 31 0, L_0xb4ce0b200;  1 drivers
v0xb4cdda1c0_0 .net/s "product_ext", 39 0, L_0xb4ce0b2a0;  1 drivers
v0xb4cdda260_0 .net/s "w", 15 0, L_0xb4d264be0;  1 drivers
v0xb4cdda300_0 .net/s "x", 15 0, L_0xb4d264b40;  1 drivers
L_0xb4ce0b0c0 .extend/s 32, L_0xb4d264b40;
L_0xb4ce0b160 .extend/s 32, L_0xb4d264be0;
L_0xb4ce0b200 .arith/mult 32, L_0xb4ce0b0c0, L_0xb4ce0b160;
L_0xb4d264a00 .part L_0xb4ce0b200, 31, 1;
L_0xb4d264aa0 .repeat 8, 8, L_0xb4d264a00;
L_0xb4ce0b2a0 .concat [ 32 8 0 0], L_0xb4ce0b200, L_0xb4d264aa0;
L_0xb4d253a20 .arith/sum 40, L_0xb4c856a40, L_0xb4ce0b2a0;
S_0xb4d248180 .scope generate, "GEN_MAC[28]" "GEN_MAC[28]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99d80 .param/l "i" 1 6 17, +C4<011100>;
S_0xb4d248300 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d248180;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc1bc0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc1c00 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc1c40 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdda3a0_0 .net/s *"_ivl_0", 31 0, L_0xb4ce0b340;  1 drivers
v0xb4cdda440_0 .net/s *"_ivl_2", 31 0, L_0xb4ce0b3e0;  1 drivers
v0xb4cdda4e0_0 .net *"_ivl_7", 0 0, L_0xb4d264c80;  1 drivers
v0xb4cdda580_0 .net *"_ivl_9", 7 0, L_0xb4d264d20;  1 drivers
L_0xb4c856a88 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cdda620_0 .net/s "acc_in", 39 0, L_0xb4c856a88;  1 drivers
v0xb4cdda6c0_0 .net/s "acc_out", 39 0, L_0xb4d253ac0;  alias, 1 drivers
v0xb4cdda760_0 .net/s "product", 31 0, L_0xb4ce0b480;  1 drivers
v0xb4cdda800_0 .net/s "product_ext", 39 0, L_0xb4ce0b520;  1 drivers
v0xb4cdda8a0_0 .net/s "w", 15 0, L_0xb4d264e60;  1 drivers
v0xb4cdda940_0 .net/s "x", 15 0, L_0xb4d264dc0;  1 drivers
L_0xb4ce0b340 .extend/s 32, L_0xb4d264dc0;
L_0xb4ce0b3e0 .extend/s 32, L_0xb4d264e60;
L_0xb4ce0b480 .arith/mult 32, L_0xb4ce0b340, L_0xb4ce0b3e0;
L_0xb4d264c80 .part L_0xb4ce0b480, 31, 1;
L_0xb4d264d20 .repeat 8, 8, L_0xb4d264c80;
L_0xb4ce0b520 .concat [ 32 8 0 0], L_0xb4ce0b480, L_0xb4d264d20;
L_0xb4d253ac0 .arith/sum 40, L_0xb4c856a88, L_0xb4ce0b520;
S_0xb4d248480 .scope generate, "GEN_MAC[29]" "GEN_MAC[29]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99dc0 .param/l "i" 1 6 17, +C4<011101>;
S_0xb4d248600 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d248480;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc1c80 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc1cc0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc1d00 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cdda9e0_0 .net/s *"_ivl_0", 31 0, L_0xb4ce0b5c0;  1 drivers
v0xb4cddaa80_0 .net/s *"_ivl_2", 31 0, L_0xb4ce0b660;  1 drivers
v0xb4cddab20_0 .net *"_ivl_7", 0 0, L_0xb4d264f00;  1 drivers
v0xb4cddabc0_0 .net *"_ivl_9", 7 0, L_0xb4d264fa0;  1 drivers
L_0xb4c856ad0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cddac60_0 .net/s "acc_in", 39 0, L_0xb4c856ad0;  1 drivers
v0xb4cddad00_0 .net/s "acc_out", 39 0, L_0xb4d253b60;  alias, 1 drivers
v0xb4cddada0_0 .net/s "product", 31 0, L_0xb4ce0b700;  1 drivers
v0xb4cddae40_0 .net/s "product_ext", 39 0, L_0xb4ce0b7a0;  1 drivers
v0xb4cddaee0_0 .net/s "w", 15 0, L_0xb4d2650e0;  1 drivers
v0xb4cddaf80_0 .net/s "x", 15 0, L_0xb4d265040;  1 drivers
L_0xb4ce0b5c0 .extend/s 32, L_0xb4d265040;
L_0xb4ce0b660 .extend/s 32, L_0xb4d2650e0;
L_0xb4ce0b700 .arith/mult 32, L_0xb4ce0b5c0, L_0xb4ce0b660;
L_0xb4d264f00 .part L_0xb4ce0b700, 31, 1;
L_0xb4d264fa0 .repeat 8, 8, L_0xb4d264f00;
L_0xb4ce0b7a0 .concat [ 32 8 0 0], L_0xb4ce0b700, L_0xb4d264fa0;
L_0xb4d253b60 .arith/sum 40, L_0xb4c856ad0, L_0xb4ce0b7a0;
S_0xb4d248780 .scope generate, "GEN_MAC[30]" "GEN_MAC[30]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99e00 .param/l "i" 1 6 17, +C4<011110>;
S_0xb4d248900 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d248780;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc1d40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc1d80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc1dc0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cddb020_0 .net/s *"_ivl_0", 31 0, L_0xb4ce0b840;  1 drivers
v0xb4cddb0c0_0 .net/s *"_ivl_2", 31 0, L_0xb4ce0b8e0;  1 drivers
v0xb4cddb160_0 .net *"_ivl_7", 0 0, L_0xb4d265180;  1 drivers
v0xb4cddb200_0 .net *"_ivl_9", 7 0, L_0xb4d265220;  1 drivers
L_0xb4c856b18 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cddb2a0_0 .net/s "acc_in", 39 0, L_0xb4c856b18;  1 drivers
v0xb4cddb340_0 .net/s "acc_out", 39 0, L_0xb4d253c00;  alias, 1 drivers
v0xb4cddb3e0_0 .net/s "product", 31 0, L_0xb4ce0b980;  1 drivers
v0xb4cddb480_0 .net/s "product_ext", 39 0, L_0xb4ce0ba20;  1 drivers
v0xb4cddb520_0 .net/s "w", 15 0, L_0xb4d265360;  1 drivers
v0xb4cddb5c0_0 .net/s "x", 15 0, L_0xb4d2652c0;  1 drivers
L_0xb4ce0b840 .extend/s 32, L_0xb4d2652c0;
L_0xb4ce0b8e0 .extend/s 32, L_0xb4d265360;
L_0xb4ce0b980 .arith/mult 32, L_0xb4ce0b840, L_0xb4ce0b8e0;
L_0xb4d265180 .part L_0xb4ce0b980, 31, 1;
L_0xb4d265220 .repeat 8, 8, L_0xb4d265180;
L_0xb4ce0ba20 .concat [ 32 8 0 0], L_0xb4ce0b980, L_0xb4d265220;
L_0xb4d253c00 .arith/sum 40, L_0xb4c856b18, L_0xb4ce0ba20;
S_0xb4d248a80 .scope generate, "GEN_MAC[31]" "GEN_MAC[31]" 6 17, 6 17 0, S_0xb4d23aa00;
 .timescale 0 0;
P_0xb4cd99e40 .param/l "i" 1 6 17, +C4<011111>;
S_0xb4d248c00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xb4d248a80;
 .timescale 0 0;
    .port_info 0 /INPUT 16 "x";
    .port_info 1 /INPUT 16 "w";
    .port_info 2 /INPUT 40 "acc_in";
    .port_info 3 /OUTPUT 40 "acc_out";
P_0xb4cdc1e00 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
P_0xb4cdc1e40 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
P_0xb4cdc1e80 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
v0xb4cddb660_0 .net/s *"_ivl_0", 31 0, L_0xb4ce0bac0;  1 drivers
v0xb4cddb700_0 .net/s *"_ivl_2", 31 0, L_0xb4ce0bb60;  1 drivers
v0xb4cddb7a0_0 .net *"_ivl_7", 0 0, L_0xb4d265400;  1 drivers
v0xb4cddb840_0 .net *"_ivl_9", 7 0, L_0xb4d2654a0;  1 drivers
L_0xb4c856b60 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0xb4cddb8e0_0 .net/s "acc_in", 39 0, L_0xb4c856b60;  1 drivers
v0xb4cddb980_0 .net/s "acc_out", 39 0, L_0xb4d253ca0;  alias, 1 drivers
v0xb4cddba20_0 .net/s "product", 31 0, L_0xb4ce0bc00;  1 drivers
v0xb4cddbac0_0 .net/s "product_ext", 39 0, L_0xb4ce0bca0;  1 drivers
v0xb4cddbb60_0 .net/s "w", 15 0, L_0xb4d2655e0;  1 drivers
v0xb4cddbc00_0 .net/s "x", 15 0, L_0xb4d265540;  1 drivers
L_0xb4ce0bac0 .extend/s 32, L_0xb4d265540;
L_0xb4ce0bb60 .extend/s 32, L_0xb4d2655e0;
L_0xb4ce0bc00 .arith/mult 32, L_0xb4ce0bac0, L_0xb4ce0bb60;
L_0xb4d265400 .part L_0xb4ce0bc00, 31, 1;
L_0xb4d2654a0 .repeat 8, 8, L_0xb4d265400;
L_0xb4ce0bca0 .concat [ 32 8 0 0], L_0xb4ce0bc00, L_0xb4d2654a0;
L_0xb4d253ca0 .arith/sum 40, L_0xb4c856b60, L_0xb4ce0bca0;
S_0xb4d248d80 .scope function.vec4.u16, "q8_8" "q8_8" 3 59, 3 59 0, S_0x1029f10d0;
 .timescale -9 -12;
; Variable q8_8 is vec4 return value of scope S_0xb4d248d80
v0xb4cde1f40_0 .var/real "value", 0 0;
TD_tb.q8_8 ;
    %load/real v0xb4cde1f40_0;
    %pushi/real 1073741824, 4074; load=256.000
    %mul/wr;
    %vpi_func 3 62 "$rtoi" 32, W<0,r> {0 1 0};
    %pad/s 16;
    %ret/vec4 0, 0, 16;  Assign to q8_8 (store_vec4_to_lval)
    %end;
S_0xb4d248f00 .scope task, "run_layer" "run_layer" 3 66, 3 66 0, S_0x1029f10d0;
 .timescale -9 -12;
E_0xb4d20f040 .event anyedge, v0xb4cde19a0_0;
TD_tb.run_layer ;
    %wait E_0xb4d20ce00;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v0xb4cde24e0_0, 0, 1;
    %wait E_0xb4d20ce00;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0xb4cde24e0_0, 0, 1;
T_1.0 ;
    %load/vec4 v0xb4cde21c0_0;
    %pad/u 32;
    %pushi/vec4 1, 0, 32;
    %cmp/e;
    %flag_get/vec4 4;
    %cmpi/ne 1, 0, 1;
    %jmp/0xz T_1.1, 6;
    %wait E_0xb4d20f040;
    %jmp T_1.0;
T_1.1 ;
    %wait E_0xb4d20ce00;
    %end;
    .scope S_0x1029dc4e0;
T_2 ;
    %wait E_0xb4d20ce40;
    %pushi/vec4 0, 0, 40;
    %store/vec4 v0xb4cda1400_0, 0, 40;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0xb4cda12c0_0, 0, 32;
T_2.0 ; Top of for-loop
    %load/vec4 v0xb4cda12c0_0;
    %cmpi/s 32, 0, 32;
	  %jmp/0xz T_2.1, 5;
    %load/vec4 v0xb4cda1400_0;
    %ix/getv/s 4, v0xb4cda12c0_0;
    %load/vec4a v0xb4cda1360, 4;
    %add;
    %store/vec4 v0xb4cda1400_0, 0, 40;
T_2.2 ; for-loop step statement
    %load/vec4 v0xb4cda12c0_0;
    %addi 1, 0, 32;
    %store/vec4 v0xb4cda12c0_0, 0, 32;
    %jmp T_2.0;
T_2.1 ; for-loop exit label
    %jmp T_2;
    .thread T_2, $push;
    .scope S_0x1029e24b0;
T_3 ;
    %wait E_0xb4d20ce00;
    %load/vec4 v0xb4cda2800_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_3.0, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cda2760_0, 0;
    %pushi/vec4 0, 0, 40;
    %assign/vec4 v0xb4cda2120_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v0xb4cda2bc0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cda2440_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cda2580_0, 0;
    %jmp T_3.1;
T_3.0 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cda2580_0, 0;
    %load/vec4 v0xb4cda28a0_0;
    %flag_set/vec4 9;
    %flag_get/vec4 9;
    %jmp/0 T_3.4, 9;
    %load/vec4 v0xb4cda2440_0;
    %nor/r;
    %and;
T_3.4;
    %flag_set/vec4 8;
    %jmp/0xz  T_3.2, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cda2760_0, 0;
    %pushi/vec4 0, 0, 40;
    %assign/vec4 v0xb4cda2120_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0xb4cda2440_0, 0;
    %jmp T_3.3;
T_3.2 ;
    %load/vec4 v0xb4cda2440_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_3.5, 8;
    %load/vec4 v0xb4cda2760_0;
    %pad/u 32;
    %cmpi/e 0, 0, 32;
    %jmp/0xz  T_3.7, 4;
    %load/vec4 v0xb4cda2620_0;
    %assign/vec4 v0xb4cda2120_0, 0;
    %load/vec4 v0xb4cda26c0_0;
    %cmpi/s 0, 0, 40;
    %flag_or 5, 4;
    %jmp/0xz  T_3.9, 5;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v0xb4cda2bc0_0, 0;
    %jmp T_3.10;
T_3.9 ;
    %load/vec4 v0xb4cda26c0_0;
    %cmpi/s 32767, 0, 40;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_3.11, 5;
    %pushi/vec4 32767, 0, 16;
    %assign/vec4 v0xb4cda2bc0_0, 0;
    %jmp T_3.12;
T_3.11 ;
    %load/vec4 v0xb4cda26c0_0;
    %parti/s 16, 0, 2;
    %assign/vec4 v0xb4cda2bc0_0, 0;
T_3.12 ;
T_3.10 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cda2440_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0xb4cda2580_0, 0;
    %jmp T_3.8;
T_3.7 ;
    %load/vec4 v0xb4cda21c0_0;
    %assign/vec4 v0xb4cda2120_0, 0;
    %load/vec4 v0xb4cda2760_0;
    %addi 1, 0, 1;
    %assign/vec4 v0xb4cda2760_0, 0;
T_3.8 ;
T_3.5 ;
T_3.3 ;
T_3.1 ;
    %jmp T_3;
    .thread T_3;
    .scope S_0xb4d225e00;
T_4 ;
    %wait E_0xb4d20d6c0;
    %pushi/vec4 0, 0, 40;
    %store/vec4 v0xb4cdb37a0_0, 0, 40;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0xb4cdb3660_0, 0, 32;
T_4.0 ; Top of for-loop
    %load/vec4 v0xb4cdb3660_0;
    %cmpi/s 32, 0, 32;
	  %jmp/0xz T_4.1, 5;
    %load/vec4 v0xb4cdb37a0_0;
    %ix/getv/s 4, v0xb4cdb3660_0;
    %load/vec4a v0xb4cdb3700, 4;
    %add;
    %store/vec4 v0xb4cdb37a0_0, 0, 40;
T_4.2 ; for-loop step statement
    %load/vec4 v0xb4cdb3660_0;
    %addi 1, 0, 32;
    %store/vec4 v0xb4cdb3660_0, 0, 32;
    %jmp T_4.0;
T_4.1 ; for-loop exit label
    %jmp T_4;
    .thread T_4, $push;
    .scope S_0xb4d225c80;
T_5 ;
    %wait E_0xb4d20ce00;
    %load/vec4 v0xb4cdb4be0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_5.0, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cdb4b40_0, 0;
    %pushi/vec4 0, 0, 40;
    %assign/vec4 v0xb4cdb4500_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v0xb4cdb4fa0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cdb4820_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cdb4960_0, 0;
    %jmp T_5.1;
T_5.0 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cdb4960_0, 0;
    %load/vec4 v0xb4cdb4c80_0;
    %flag_set/vec4 9;
    %flag_get/vec4 9;
    %jmp/0 T_5.4, 9;
    %load/vec4 v0xb4cdb4820_0;
    %nor/r;
    %and;
T_5.4;
    %flag_set/vec4 8;
    %jmp/0xz  T_5.2, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cdb4b40_0, 0;
    %pushi/vec4 0, 0, 40;
    %assign/vec4 v0xb4cdb4500_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0xb4cdb4820_0, 0;
    %jmp T_5.3;
T_5.2 ;
    %load/vec4 v0xb4cdb4820_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_5.5, 8;
    %load/vec4 v0xb4cdb4b40_0;
    %pad/u 32;
    %cmpi/e 0, 0, 32;
    %jmp/0xz  T_5.7, 4;
    %load/vec4 v0xb4cdb4a00_0;
    %assign/vec4 v0xb4cdb4500_0, 0;
    %load/vec4 v0xb4cdb4aa0_0;
    %cmpi/s 0, 0, 40;
    %flag_or 5, 4;
    %jmp/0xz  T_5.9, 5;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v0xb4cdb4fa0_0, 0;
    %jmp T_5.10;
T_5.9 ;
    %load/vec4 v0xb4cdb4aa0_0;
    %cmpi/s 32767, 0, 40;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_5.11, 5;
    %pushi/vec4 32767, 0, 16;
    %assign/vec4 v0xb4cdb4fa0_0, 0;
    %jmp T_5.12;
T_5.11 ;
    %load/vec4 v0xb4cdb4aa0_0;
    %parti/s 16, 0, 2;
    %assign/vec4 v0xb4cdb4fa0_0, 0;
T_5.12 ;
T_5.10 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cdb4820_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0xb4cdb4960_0, 0;
    %jmp T_5.8;
T_5.7 ;
    %load/vec4 v0xb4cdb45a0_0;
    %assign/vec4 v0xb4cdb4500_0, 0;
    %load/vec4 v0xb4cdb4b40_0;
    %addi 1, 0, 1;
    %assign/vec4 v0xb4cdb4b40_0, 0;
T_5.8 ;
T_5.5 ;
T_5.3 ;
T_5.1 ;
    %jmp T_5;
    .thread T_5;
    .scope S_0xb4d234480;
T_6 ;
    %wait E_0xb4d20df40;
    %pushi/vec4 0, 0, 40;
    %store/vec4 v0xb4cdc5b80_0, 0, 40;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0xb4cdc5a40_0, 0, 32;
T_6.0 ; Top of for-loop
    %load/vec4 v0xb4cdc5a40_0;
    %cmpi/s 32, 0, 32;
	  %jmp/0xz T_6.1, 5;
    %load/vec4 v0xb4cdc5b80_0;
    %ix/getv/s 4, v0xb4cdc5a40_0;
    %load/vec4a v0xb4cdc5ae0, 4;
    %add;
    %store/vec4 v0xb4cdc5b80_0, 0, 40;
T_6.2 ; for-loop step statement
    %load/vec4 v0xb4cdc5a40_0;
    %addi 1, 0, 32;
    %store/vec4 v0xb4cdc5a40_0, 0, 32;
    %jmp T_6.0;
T_6.1 ; for-loop exit label
    %jmp T_6;
    .thread T_6, $push;
    .scope S_0xb4d234300;
T_7 ;
    %wait E_0xb4d20ce00;
    %load/vec4 v0xb4cdc6f80_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_7.0, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cdc6ee0_0, 0;
    %pushi/vec4 0, 0, 40;
    %assign/vec4 v0xb4cdc68a0_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v0xb4cdc7340_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cdc6bc0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cdc6d00_0, 0;
    %jmp T_7.1;
T_7.0 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cdc6d00_0, 0;
    %load/vec4 v0xb4cdc7020_0;
    %flag_set/vec4 9;
    %flag_get/vec4 9;
    %jmp/0 T_7.4, 9;
    %load/vec4 v0xb4cdc6bc0_0;
    %nor/r;
    %and;
T_7.4;
    %flag_set/vec4 8;
    %jmp/0xz  T_7.2, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cdc6ee0_0, 0;
    %pushi/vec4 0, 0, 40;
    %assign/vec4 v0xb4cdc68a0_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0xb4cdc6bc0_0, 0;
    %jmp T_7.3;
T_7.2 ;
    %load/vec4 v0xb4cdc6bc0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_7.5, 8;
    %load/vec4 v0xb4cdc6ee0_0;
    %pad/u 32;
    %cmpi/e 0, 0, 32;
    %jmp/0xz  T_7.7, 4;
    %load/vec4 v0xb4cdc6da0_0;
    %assign/vec4 v0xb4cdc68a0_0, 0;
    %load/vec4 v0xb4cdc6e40_0;
    %cmpi/s 0, 0, 40;
    %flag_or 5, 4;
    %jmp/0xz  T_7.9, 5;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v0xb4cdc7340_0, 0;
    %jmp T_7.10;
T_7.9 ;
    %load/vec4 v0xb4cdc6e40_0;
    %cmpi/s 32767, 0, 40;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_7.11, 5;
    %pushi/vec4 32767, 0, 16;
    %assign/vec4 v0xb4cdc7340_0, 0;
    %jmp T_7.12;
T_7.11 ;
    %load/vec4 v0xb4cdc6e40_0;
    %parti/s 16, 0, 2;
    %assign/vec4 v0xb4cdc7340_0, 0;
T_7.12 ;
T_7.10 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cdc6bc0_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0xb4cdc6d00_0, 0;
    %jmp T_7.8;
T_7.7 ;
    %load/vec4 v0xb4cdc6940_0;
    %assign/vec4 v0xb4cdc68a0_0, 0;
    %load/vec4 v0xb4cdc6ee0_0;
    %addi 1, 0, 1;
    %assign/vec4 v0xb4cdc6ee0_0, 0;
T_7.8 ;
T_7.5 ;
T_7.3 ;
T_7.1 ;
    %jmp T_7;
    .thread T_7;
    .scope S_0xb4d23aa00;
T_8 ;
    %wait E_0xb4d20e7c0;
    %pushi/vec4 0, 0, 40;
    %store/vec4 v0xb4cddbf20_0, 0, 40;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0xb4cddbde0_0, 0, 32;
T_8.0 ; Top of for-loop
    %load/vec4 v0xb4cddbde0_0;
    %cmpi/s 32, 0, 32;
	  %jmp/0xz T_8.1, 5;
    %load/vec4 v0xb4cddbf20_0;
    %ix/getv/s 4, v0xb4cddbde0_0;
    %load/vec4a v0xb4cddbe80, 4;
    %add;
    %store/vec4 v0xb4cddbf20_0, 0, 40;
T_8.2 ; for-loop step statement
    %load/vec4 v0xb4cddbde0_0;
    %addi 1, 0, 32;
    %store/vec4 v0xb4cddbde0_0, 0, 32;
    %jmp T_8.0;
T_8.1 ; for-loop exit label
    %jmp T_8;
    .thread T_8, $push;
    .scope S_0xb4d23a880;
T_9 ;
    %wait E_0xb4d20ce00;
    %load/vec4 v0xb4cde1360_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_9.0, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cde12c0_0, 0;
    %pushi/vec4 0, 0, 40;
    %assign/vec4 v0xb4cde0c80_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v0xb4cde1720_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cde0fa0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cde10e0_0, 0;
    %jmp T_9.1;
T_9.0 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cde10e0_0, 0;
    %load/vec4 v0xb4cde1400_0;
    %flag_set/vec4 9;
    %flag_get/vec4 9;
    %jmp/0 T_9.4, 9;
    %load/vec4 v0xb4cde0fa0_0;
    %nor/r;
    %and;
T_9.4;
    %flag_set/vec4 8;
    %jmp/0xz  T_9.2, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cde12c0_0, 0;
    %pushi/vec4 0, 0, 40;
    %assign/vec4 v0xb4cde0c80_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0xb4cde0fa0_0, 0;
    %jmp T_9.3;
T_9.2 ;
    %load/vec4 v0xb4cde0fa0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_9.5, 8;
    %load/vec4 v0xb4cde12c0_0;
    %pad/u 32;
    %cmpi/e 0, 0, 32;
    %jmp/0xz  T_9.7, 4;
    %load/vec4 v0xb4cde1180_0;
    %assign/vec4 v0xb4cde0c80_0, 0;
    %load/vec4 v0xb4cde1220_0;
    %cmpi/s 0, 0, 40;
    %flag_or 5, 4;
    %jmp/0xz  T_9.9, 5;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v0xb4cde1720_0, 0;
    %jmp T_9.10;
T_9.9 ;
    %load/vec4 v0xb4cde1220_0;
    %cmpi/s 32767, 0, 40;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_9.11, 5;
    %pushi/vec4 32767, 0, 16;
    %assign/vec4 v0xb4cde1720_0, 0;
    %jmp T_9.12;
T_9.11 ;
    %load/vec4 v0xb4cde1220_0;
    %parti/s 16, 0, 2;
    %assign/vec4 v0xb4cde1720_0, 0;
T_9.12 ;
T_9.10 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0xb4cde0fa0_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0xb4cde10e0_0, 0;
    %jmp T_9.8;
T_9.7 ;
    %load/vec4 v0xb4cde0d20_0;
    %assign/vec4 v0xb4cde0c80_0, 0;
    %load/vec4 v0xb4cde12c0_0;
    %addi 1, 0, 1;
    %assign/vec4 v0xb4cde12c0_0, 0;
T_9.8 ;
T_9.5 ;
T_9.3 ;
T_9.1 ;
    %jmp T_9;
    .thread T_9;
    .scope S_0x1029f10d0;
T_10 ;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0xb4cde2120_0, 0, 1;
T_10.0 ;
    %delay 5000, 0;
    %load/vec4 v0xb4cde2120_0;
    %inv;
    %store/vec4 v0xb4cde2120_0, 0, 1;
    %jmp T_10.0;
T_10.1 ;
    %end;
    .thread T_10;
    .scope S_0x1029f10d0;
T_11 ;
    %vpi_call/w 3 82 "$dumpfile", "sim/parametric.vcd" {0 0 0};
    %vpi_call/w 3 83 "$dumpvars", 32'sb00000000000000000000000000000000, S_0x1029f10d0 {0 0 0};
    %pushi/vec4 1, 0, 1;
    %store/vec4 v0xb4cde2440_0, 0, 1;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0xb4cde24e0_0, 0, 1;
    %pushi/vec4 0, 0, 512;
    %store/vec4 v0xb4cde2620_0, 0, 512;
    %pushi/vec4 0, 0, 2048;
    %store/vec4 v0xb4cde2580_0, 0, 2048;
    %pushi/vec4 0, 0, 64;
    %store/vec4 v0xb4cde1fe0_0, 0, 64;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0xb4cde2260_0, 0, 32;
    %pushi/vec4 2, 0, 32;
T_11.0 %dup/vec4;
    %cmpi/s 0, 0, 32;
    %jmp/1xz T_11.1, 5;
    %jmp/1 T_11.1, 4;
    %subi 1, 0, 32;
    %wait E_0xb4d20ce00;
    %jmp T_11.0;
T_11.1 ;
    %pop/vec4 1;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0xb4cde2440_0, 0, 1;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0xb4cde23a0_0, 0, 32;
T_11.2 ; Top of for-loop
    %load/vec4 v0xb4cde23a0_0;
    %cmpi/s 32, 0, 32;
	  %jmp/0xz T_11.3, 5;
    %pushi/real 1073741824, 4066; load=1.00000
    %store/real v0xb4cde1f40_0;
    %callf/vec4 TD_tb.q8_8, S_0xb4d248d80;
    %load/vec4 v0xb4cde23a0_0;
    %muli 16, 0, 32;
    %ix/vec4/s 4;
    %store/vec4 v0xb4cde2620_0, 4, 16;
T_11.4 ; for-loop step statement
    %load/vec4 v0xb4cde23a0_0;
    %addi 1, 0, 32;
    %store/vec4 v0xb4cde23a0_0, 0, 32;
    %jmp T_11.2;
T_11.3 ; for-loop exit label
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0xb4cde23a0_0, 0, 32;
T_11.5 ; Top of for-loop
    %load/vec4 v0xb4cde23a0_0;
    %cmpi/s 32, 0, 32;
	  %jmp/0xz T_11.6, 5;
    %pushi/real 1073741824, 4066; load=1.00000
    %store/real v0xb4cde1f40_0;
    %callf/vec4 TD_tb.q8_8, S_0xb4d248d80;
    %pushi/vec4 0, 0, 32;
    %load/vec4 v0xb4cde23a0_0;
    %muli 16, 0, 32;
    %add;
    %ix/vec4/s 4;
    %store/vec4 v0xb4cde2580_0, 4, 16;
T_11.7 ; for-loop step statement
    %load/vec4 v0xb4cde23a0_0;
    %addi 1, 0, 32;
    %store/vec4 v0xb4cde23a0_0, 0, 32;
    %jmp T_11.5;
T_11.6 ; for-loop exit label
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0xb4cde23a0_0, 0, 32;
T_11.8 ; Top of for-loop
    %load/vec4 v0xb4cde23a0_0;
    %cmpi/s 32, 0, 32;
	  %jmp/0xz T_11.9, 5;
    %pushi/real 1073741824, 4065; load=0.500000
    %store/real v0xb4cde1f40_0;
    %callf/vec4 TD_tb.q8_8, S_0xb4d248d80;
    %pushi/vec4 512, 0, 32;
    %load/vec4 v0xb4cde23a0_0;
    %muli 16, 0, 32;
    %add;
    %ix/vec4/s 4;
    %store/vec4 v0xb4cde2580_0, 4, 16;
T_11.10 ; for-loop step statement
    %load/vec4 v0xb4cde23a0_0;
    %addi 1, 0, 32;
    %store/vec4 v0xb4cde23a0_0, 0, 32;
    %jmp T_11.8;
T_11.9 ; for-loop exit label
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0xb4cde23a0_0, 0, 32;
T_11.11 ; Top of for-loop
    %load/vec4 v0xb4cde23a0_0;
    %cmpi/s 32, 0, 32;
	  %jmp/0xz T_11.12, 5;
    %pushi/real 1073741824, 20449; load=-0.500000
    %store/real v0xb4cde1f40_0;
    %callf/vec4 TD_tb.q8_8, S_0xb4d248d80;
    %pushi/vec4 1024, 0, 32;
    %load/vec4 v0xb4cde23a0_0;
    %muli 16, 0, 32;
    %add;
    %ix/vec4/s 4;
    %store/vec4 v0xb4cde2580_0, 4, 16;
T_11.13 ; for-loop step statement
    %load/vec4 v0xb4cde23a0_0;
    %addi 1, 0, 32;
    %store/vec4 v0xb4cde23a0_0, 0, 32;
    %jmp T_11.11;
T_11.12 ; for-loop exit label
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0xb4cde23a0_0, 0, 32;
T_11.14 ; Top of for-loop
    %load/vec4 v0xb4cde23a0_0;
    %cmpi/s 32, 0, 32;
	  %jmp/0xz T_11.15, 5;
    %pushi/real 1073741824, 4067; load=2.00000
    %store/real v0xb4cde1f40_0;
    %callf/vec4 TD_tb.q8_8, S_0xb4d248d80;
    %pushi/vec4 1536, 0, 32;
    %load/vec4 v0xb4cde23a0_0;
    %muli 16, 0, 32;
    %add;
    %ix/vec4/s 4;
    %store/vec4 v0xb4cde2580_0, 4, 16;
T_11.16 ; for-loop step statement
    %load/vec4 v0xb4cde23a0_0;
    %addi 1, 0, 32;
    %store/vec4 v0xb4cde23a0_0, 0, 32;
    %jmp T_11.14;
T_11.15 ; for-loop exit label
    %vpi_call/w 3 192 "$display", "\000" {0 0 0};
    %vpi_call/w 3 193 "$display", "========================================" {0 0 0};
    %vpi_call/w 3 194 "$display", "PARAMETRIC LAYER TEST" {0 0 0};
    %vpi_call/w 3 195 "$display", "N_INPUTS  = %0d", P_0x1029f0bd0 {0 0 0};
    %vpi_call/w 3 196 "$display", "N_NEURONS = %0d", P_0x1029f0c10 {0 0 0};
    %vpi_call/w 3 197 "$display", "PARALLEL  = %0d", P_0x1029f0c50 {0 0 0};
    %vpi_call/w 3 198 "$display", "========================================" {0 0 0};
    %fork TD_tb.run_layer, S_0xb4d248f00;
    %join;
    %pushi/vec4 8192, 0, 32;
    %store/vec4 v0xb4cde2300_0, 0, 32;
    %load/vec4 v0xb4cde26c0_0;
    %parti/s 16, 0, 2;
    %load/vec4 v0xb4cde2300_0;
    %parti/s 16, 0, 2;
    %cmp/ne;
    %jmp/0xz  T_11.17, 6;
    %vpi_call/w 3 208 "$display", "FAIL N0: got %0d expected %0d", &PV<v0xb4cde26c0_0, 0, 16>, v0xb4cde2300_0 {0 0 0};
    %load/vec4 v0xb4cde2260_0;
    %addi 1, 0, 32;
    %store/vec4 v0xb4cde2260_0, 0, 32;
    %jmp T_11.18;
T_11.17 ;
    %vpi_call/w 3 213 "$display", "PASS N0: %0d", &PV<v0xb4cde26c0_0, 0, 16> {0 0 0};
T_11.18 ;
    %pushi/vec4 4096, 0, 32;
    %store/vec4 v0xb4cde2300_0, 0, 32;
    %load/vec4 v0xb4cde26c0_0;
    %parti/s 16, 16, 6;
    %load/vec4 v0xb4cde2300_0;
    %parti/s 16, 0, 2;
    %cmp/ne;
    %jmp/0xz  T_11.19, 6;
    %vpi_call/w 3 222 "$display", "FAIL N1: got %0d expected %0d", &PV<v0xb4cde26c0_0, 16, 16>, v0xb4cde2300_0 {0 0 0};
    %load/vec4 v0xb4cde2260_0;
    %addi 1, 0, 32;
    %store/vec4 v0xb4cde2260_0, 0, 32;
    %jmp T_11.20;
T_11.19 ;
    %vpi_call/w 3 227 "$display", "PASS N1: %0d", &PV<v0xb4cde26c0_0, 16, 16> {0 0 0};
T_11.20 ;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0xb4cde2300_0, 0, 32;
    %load/vec4 v0xb4cde26c0_0;
    %parti/s 16, 32, 7;
    %cmpi/ne 0, 0, 16;
    %jmp/0xz  T_11.21, 6;
    %vpi_call/w 3 237 "$display", "FAIL N2: got %0d expected 0", &PV<v0xb4cde26c0_0, 32, 16> {0 0 0};
    %load/vec4 v0xb4cde2260_0;
    %addi 1, 0, 32;
    %store/vec4 v0xb4cde2260_0, 0, 32;
    %jmp T_11.22;
T_11.21 ;
    %vpi_call/w 3 242 "$display", "PASS N2: 0 (ReLU)" {0 0 0};
T_11.22 ;
    %pushi/vec4 16384, 0, 32;
    %store/vec4 v0xb4cde2300_0, 0, 32;
    %load/vec4 v0xb4cde2300_0;
    %cmpi/s 32767, 0, 32;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_11.23, 5;
    %pushi/vec4 32767, 0, 32;
    %store/vec4 v0xb4cde2300_0, 0, 32;
T_11.23 ;
    %load/vec4 v0xb4cde26c0_0;
    %parti/s 16, 48, 7;
    %load/vec4 v0xb4cde2300_0;
    %parti/s 16, 0, 2;
    %cmp/ne;
    %jmp/0xz  T_11.25, 6;
    %vpi_call/w 3 260 "$display", "FAIL N3: got %0d expected %0d", &PV<v0xb4cde26c0_0, 48, 16>, v0xb4cde2300_0 {0 0 0};
    %load/vec4 v0xb4cde2260_0;
    %addi 1, 0, 32;
    %store/vec4 v0xb4cde2260_0, 0, 32;
    %jmp T_11.26;
T_11.25 ;
    %load/vec4 v0xb4cde2300_0;
    %cmpi/e 32767, 0, 32;
    %jmp/0xz  T_11.27, 4;
    %vpi_call/w 3 266 "$display", "PASS N3: %0d (saturation)", &PV<v0xb4cde26c0_0, 48, 16> {0 0 0};
    %jmp T_11.28;
T_11.27 ;
    %vpi_call/w 3 268 "$display", "PASS N3: %0d", &PV<v0xb4cde26c0_0, 48, 16> {0 0 0};
T_11.28 ;
T_11.26 ;
    %load/vec4 v0xb4cde2080_0;
    %pad/u 32;
    %cmpi/ne 0, 0, 32;
    %jmp/0xz  T_11.29, 6;
    %vpi_call/w 3 329 "$display", "FAIL: busy still active" {0 0 0};
    %load/vec4 v0xb4cde2260_0;
    %addi 1, 0, 32;
    %store/vec4 v0xb4cde2260_0, 0, 32;
T_11.29 ;
    %load/vec4 v0xb4cde21c0_0;
    %pad/u 32;
    %cmpi/ne 1, 0, 32;
    %jmp/0xz  T_11.31, 6;
    %vpi_call/w 3 334 "$display", "FAIL: done not asserted" {0 0 0};
    %load/vec4 v0xb4cde2260_0;
    %addi 1, 0, 32;
    %store/vec4 v0xb4cde2260_0, 0, 32;
T_11.31 ;
    %vpi_call/w 3 338 "$display", "\000" {0 0 0};
    %vpi_call/w 3 339 "$display", "========================================" {0 0 0};
    %load/vec4 v0xb4cde2260_0;
    %cmpi/e 0, 0, 32;
    %jmp/0xz  T_11.33, 4;
    %vpi_call/w 3 342 "$display", "PARAMETRIC TEST PASSED" {0 0 0};
    %jmp T_11.34;
T_11.33 ;
    %vpi_call/w 3 344 "$display", "PARAMETRIC TEST FAILED: %0d errors", v0xb4cde2260_0 {0 0 0};
T_11.34 ;
    %vpi_call/w 3 346 "$display", "========================================" {0 0 0};
    %vpi_call/w 3 347 "$display", "\000" {0 0 0};
    %vpi_call/w 3 349 "$finish" {0 0 0};
    %end;
    .thread T_11;
# The file index is used to find the file name in the following table.
:file_names 8;
    "N/A";
    "<interactive>";
    "-";
    "sim/parametric_tb.v";
    "rtl/layer.v";
    "rtl/neuron_parallel.v";
    "rtl/mac8.v";
    "rtl/mac_unit.v";
