Files
FPGA-Neural-Datasheet/files/docs/datasheet
micheleandClaude Sonnet 5 58b7374106 docs: real KiCad schematic review + reserved PCB module section
Adds a dated review section recording today's actual schematic check
against every real ball assignment in this chapter: confirmed-correct
items, two real findings needing correction (boot-flash net-name
mismatch FGPA/FPGA typo + SCLK/CLK label mismatch that would leave the
flash electrically disconnected from the ECP5's config engine; SDRAM
CAS#/WE# appearing swapped vs. the verified F7/F9 assignment), and
open items not resolvable from the schematic image alone (regulator EN
pins, a stray +1V1 label near the VCCAUX ferrite, JTAG pull-up/down
array polarity).

Also reserves a "PCB module form factor" section (castellated-edge SMD
module, ~50x25mm) for the future physical layout.

Compiled clean (46 pages, 0 errors).

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_013xXuuRUWZScuo1DeYJxs3v
2026-09-07 19:35:03 +02:00
..

FPGA-Neural — Datasheet

Datasheet tecnico multicapitolo dell'engine FPGA-Neural, in italiano e inglese. Ricostruito a partire dal codice RTL, dalla documentazione e dai benchmark presenti nella repository (revisione A1, settembre 2026).

Struttura

docs/datasheet/
├── FPGA-Neural-Datasheet.pdf        ← PDF italiano (36 pagine)
├── FPGA-Neural-Datasheet.tex        ← sorgente principale (IT)
├── preamble.tex                     ← stili, palette, box, TikZ
├── chapters/                        ← 14 capitoli (IT)
└── en/
    ├── FPGA-Neural-Datasheet-EN.pdf ← PDF inglese (36 pagine)
    ├── FPGA-Neural-Datasheet-EN.tex ← sorgente principale (EN)
    ├── preamble.tex                 ← stili (EN)
    └── chapters/                    ← 14 capitoli (EN)

Compilazione

Serve una distribuzione LaTeX con pgfplots, tikz-timing, tcolorbox, ltablex, listings, babel.

# Italiano
cd docs/datasheet
pdflatex FPGA-Neural-Datasheet.tex
pdflatex FPGA-Neural-Datasheet.tex   # 2ª passata per indice e riferimenti

# Inglese
cd docs/datasheet/en
pdflatex FPGA-Neural-Datasheet-EN.tex
pdflatex FPGA-Neural-Datasheet-EN.tex

Nota sul pinout

Il capitolo Progetto hardware e mappa dei segnali riporta l'analisi completa segnale-per-segnale del top-level spi_neuron_top, con la colonna Ball compilata con assegnazioni CABGA381 reali (53 segnali, .lpf reale in synth/) e verificata da un place&route reale (nextpnr-ecp5, 0 errori di vincolo, Program finished normally) — non più auto-piazzate.