Streaming (main feature this session): - New WebRadioConfig/WebRadioJson core types, ISecureStore-backed persistence - New webradio::WebRadioService (thread-safe live config) + GET/POST /api/streaming - web_radio_stream task now runtime-toggleable (no reboot), no hardcoded URL - Content-Type diagnostic: warns clearly when a URL is a webpage, not an audio stream Boot cleanup: - Removed boot-time auto FM/DAB tune, auto-beep, and the (now-concluded) Si4684 crystal IBIAS/CTUN empirical sweep from main.cpp — tuning/beep are on-demand via the existing REST API only Web UI: - Modernized styling (cards, gradients, toggle switches, light/dark theme) - New Stream tab wired to /api/streaming Fixes found via real idf.py build (not just clangd): - Restored wrongly-removed si4684/Si4684Tuner.hpp include in main.cpp - Fixed MP3Decode() argument types in web_radio_stream.cpp (unsigned char**/int*) Quality-gate fixes: - Host-test stub headers (esp_log.h, freertos/*) so TunerService.cpp's scanForStation logging/pacing compiles for station_service_test / integration_service_test instead of running stale binaries - Added WifiScanner and WebRadioService manual sections; filled in missing Doxygen docs on BluetoothService, i2s_sdata_probe, test_firmware, Bt1035At - Ignore clangd's .cache/ index directory Also includes prior uncommitted work carried in the tree: Wi-Fi/Bluetooth device scan REST API and UI (WifiScanner, BT scan), SigmaStudio TCP bridge, and the current ADAU1701 SigmaStudio DSP program export. Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
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Note Hardware per DigiRadio
1. Gestione Alimentazione
- VCHG/VBAT: Il modulo supporta ingressi da 3.0V a 4.2V.
- SYS_CTRL: Richiede un impulso di >20ms per avviare il power-up da stato DORMANT/OFF.
2. Integrazione ADAU1701 (DSP)
Se il DigiRadio utilizza l'ADAU1701 come processore audio:
- Collegare le uscite
SPK_P/Ndel modulo agli ingressi analogici dell'ADAU1701 (tramite filtro passivo come descritto nel datasheet ADAU1701). - In alternativa, utilizzare l'interfaccia I2S (Pin 4-7 del BT1035) per un collegamento digitale diretto, garantendo che i clock (BCLK, LRCLK) siano configurati in modalità coerente (BT1035 come Master/Slave a seconda del setup dell'ADAU).