Add SigmaStudio manual chapter and align EQ runtime with export map.
Document the ADAU1701 schematic chain (sigma-chain.jpg), cross-link from hardware/firmware chapters, skip safeload on fixed high-pass band 0, and match EqProfile default peaking frequencies to SigmaStudio. Co-authored-by: Cursor <cursoragent@cursor.com>
This commit is contained in:
@@ -18,24 +18,27 @@ namespace core {
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namespace {
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namespace {
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constexpr std::array<std::uint32_t, EqBandIndex::kBandCount> kDefaultCenters{
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constexpr std::array<std::uint32_t, EqBandIndex::kBandCount> kDefaultCenters{
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40U, 100U, 250U, 1000U, 4000U, 12000U};
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20U, 100U, 400U, 1000U, 3000U, 8000U};
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constexpr std::array<float, EqBandIndex::kBandCount> kDefaultQ{
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1.414F, 1.0F, 1.0F, 1.0F, 1.0F, 1.0F};
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[[nodiscard]] std::array<EqBandSettings, EqBandIndex::kBandCount>
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[[nodiscard]] std::array<EqBandSettings, EqBandIndex::kBandCount>
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makeDefaultBands() noexcept
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makeDefaultBands() noexcept
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{
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{
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return std::array<EqBandSettings, EqBandIndex::kBandCount>{
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return std::array<EqBandSettings, EqBandIndex::kBandCount>{
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EqBandSettings{GainDb::zero(), *FrequencyHz::tryFromHz(kDefaultCenters[0]),
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EqBandSettings{GainDb::zero(), *FrequencyHz::tryFromHz(kDefaultCenters[0]),
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1.414F},
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kDefaultQ[0]},
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EqBandSettings{GainDb::zero(), *FrequencyHz::tryFromHz(kDefaultCenters[1]),
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EqBandSettings{GainDb::zero(), *FrequencyHz::tryFromHz(kDefaultCenters[1]),
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1.414F},
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kDefaultQ[1]},
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EqBandSettings{GainDb::zero(), *FrequencyHz::tryFromHz(kDefaultCenters[2]),
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EqBandSettings{GainDb::zero(), *FrequencyHz::tryFromHz(kDefaultCenters[2]),
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1.414F},
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kDefaultQ[2]},
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EqBandSettings{GainDb::zero(), *FrequencyHz::tryFromHz(kDefaultCenters[3]),
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EqBandSettings{GainDb::zero(), *FrequencyHz::tryFromHz(kDefaultCenters[3]),
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1.414F},
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kDefaultQ[3]},
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EqBandSettings{GainDb::zero(), *FrequencyHz::tryFromHz(kDefaultCenters[4]),
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EqBandSettings{GainDb::zero(), *FrequencyHz::tryFromHz(kDefaultCenters[4]),
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1.414F},
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kDefaultQ[4]},
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EqBandSettings{GainDb::zero(), *FrequencyHz::tryFromHz(kDefaultCenters[5]),
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EqBandSettings{GainDb::zero(), *FrequencyHz::tryFromHz(kDefaultCenters[5]),
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1.414F},
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kDefaultQ[5]},
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};
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};
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}
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}
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@@ -30,6 +30,7 @@ enum class Adau1701Error {
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DownloadFailed,
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DownloadFailed,
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NotBooted,
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NotBooted,
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SafeloadFailed,
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SafeloadFailed,
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InvalidParameter,
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};
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};
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} // namespace adau1701
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} // namespace adau1701
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@@ -38,6 +38,8 @@ namespace adau1701 {
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namespace {
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namespace {
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constexpr char kTag[] = "Adau1701";
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constexpr char kTag[] = "Adau1701";
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constexpr int kI2cPort = 0;
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constexpr int kI2cPort = 0;
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/** Index 0 is the fixed high-pass band (SigmaStudio band 1); not safeloaded. */
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constexpr std::uint8_t kFixedHighPassBandIndex = 0U;
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} // namespace
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} // namespace
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Adau1701Driver::Adau1701Driver(Adau1701Pins pins)
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Adau1701Driver::Adau1701Driver(Adau1701Pins pins)
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@@ -197,6 +199,10 @@ std::expected<void, Adau1701Error> Adau1701Driver::applyMixer(
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std::expected<void, Adau1701Error> Adau1701Driver::setEqBand(
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std::expected<void, Adau1701Error> Adau1701Driver::setEqBand(
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core::EqBandIndex band, core::GainDb gain, core::FrequencyHz center, float q)
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core::EqBandIndex band, core::GainDb gain, core::FrequencyHz center, float q)
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{
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{
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if (band.value() == kFixedHighPassBandIndex) {
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return std::unexpected(Adau1701Error::InvalidParameter);
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}
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if (auto ready = ensureBooted(); !ready) {
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if (auto ready = ensureBooted(); !ready) {
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return ready;
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return ready;
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}
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}
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@@ -227,6 +233,9 @@ std::expected<void, Adau1701Error> Adau1701Driver::applyEq(
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}
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}
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for (std::uint8_t i = 0; i < core::EqBandIndex::kBandCount; ++i) {
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for (std::uint8_t i = 0; i < core::EqBandIndex::kBandCount; ++i) {
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if (i == kFixedHighPassBandIndex) {
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continue;
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}
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const auto index = core::EqBandIndex::tryFromIndex(i);
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const auto index = core::EqBandIndex::tryFromIndex(i);
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if (!index) {
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if (!index) {
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return std::unexpected(Adau1701Error::SafeloadFailed);
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return std::unexpected(Adau1701Error::SafeloadFailed);
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@@ -25,6 +25,8 @@ core::DspError Adau1701Dsp::mapError(Adau1701Error error) noexcept
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switch (error) {
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switch (error) {
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case Adau1701Error::NotBooted:
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case Adau1701Error::NotBooted:
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return core::DspError::NotBooted;
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return core::DspError::NotBooted;
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case Adau1701Error::InvalidParameter:
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return core::DspError::InvalidParameter;
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case Adau1701Error::SafeloadFailed:
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case Adau1701Error::SafeloadFailed:
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return core::DspError::SafeloadFailed;
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return core::DspError::SafeloadFailed;
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default:
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default:
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@@ -162,9 +162,11 @@ Strong index into the six-band \texttt{Param EQ1} module (0--5). Maps to
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parameter RAM via \texttt{adau1701::paramAddrEqBandBase()}.
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parameter RAM via \texttt{adau1701::paramAddrEqBandBase()}.
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\section{EqProfile}\label{cls:EqProfile}
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\section{EqProfile}\label{cls:EqProfile}
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Six-band parametric EQ snapshot with default centre frequencies
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Six-band parametric EQ snapshot aligned with the SigmaStudio map
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(40\,Hz--12\,kHz). Designed in the pure core; coefficients safeloaded by
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(Chapter~\ref{ch:sigmastudio}): band index~0 is the fixed 20\,Hz
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\texttt{Adau1701Driver::applyEq()}.
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high-pass; bands 1--5 are peaking at 100\,Hz--8\,kHz. Designed in the
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pure core; peaking bands are safeloaded by \texttt{Adau1701Driver::applyEq()}
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(band~0 is skipped).
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\section{IDsp}\label{cls:IDsp}
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\section{IDsp}\label{cls:IDsp}
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Abstract ADAU1701 control boundary. Defines \texttt{applyProfile()},
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Abstract ADAU1701 control boundary. Defines \texttt{applyProfile()},
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@@ -134,6 +134,9 @@ The board carries no self-boot EEPROM. Instead, the ESP32 writes the
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SigmaStudio-exported program into the DSP's RAM at \emph{every} boot.
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SigmaStudio-exported program into the DSP's RAM at \emph{every} boot.
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Runtime changes to equalisation and mixing use the ADAU1701 safeload
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Runtime changes to equalisation and mixing use the ADAU1701 safeload
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mechanism, so parameter updates are click-free while audio is playing.
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mechanism, so parameter updates are click-free while audio is playing.
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Which blocks are runtime-controllable (source faders, EQ bands 2--6,
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master volume) versus fixed at export (high-pass, limiters) is listed in
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Chapter~\ref{ch:sigmastudio}, Section~\ref{sec:ss-runtime}.
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\begin{drcaution}[Safeload]
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\begin{drcaution}[Safeload]
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Writing DSP parameter cells directly while audio is running produces
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Writing DSP parameter cells directly while audio is running produces
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@@ -95,7 +95,9 @@ the signal reaches the Bluetooth stage.
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\subsection{Control and program loading}
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\subsection{Control and program loading}
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The DSP is controlled over I\textsuperscript{2}C. Its signal-processing
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The DSP is controlled over I\textsuperscript{2}C. Its signal-processing
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program is designed in SigmaStudio and exported as a sequence of register
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program is designed in SigmaStudio and exported as a sequence of register
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writes (control settings, program RAM, and parameter RAM).
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writes (control settings, program RAM, and parameter RAM). The full
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SigmaStudio schematic, signal chain, and runtime parameter map are
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documented in Chapter~\ref{ch:sigmastudio}.
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\begin{drkey}[RAM boot, no EEPROM]
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\begin{drkey}[RAM boot, no EEPROM]
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The board deliberately omits the ADAU1701 self-boot EEPROM. Instead, the
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The board deliberately omits the ADAU1701 self-boot EEPROM. Instead, the
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@@ -0,0 +1,245 @@
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\chapter{DSP Configuration (SigmaStudio)}
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\label{ch:sigmastudio}
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This chapter documents how the ADAU1701 is configured in SigmaStudio: the
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hardware settings that must match the board, the audio signal-processing
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chain, and the parameters exposed for runtime control by the ESP32. The
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resulting SigmaStudio export is what the host writes into the DSP's RAM at
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every boot (Section~\ref{sec:hw-adau}).
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\section{Overview}
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\label{sec:ss-overview}
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The DSP program is built once in SigmaStudio and exported as a sequence of
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register writes. Because the board carries no self-boot EEPROM, the ESP32
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replays that sequence over I\textsuperscript{2}C (address 0x34) on every
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power-up. SigmaStudio is therefore used purely to \emph{design and export}
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the program, not to drive the chip in operation.
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\begin{drkey}[No hardware required to export]
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The whole program can be built and exported offline, without a physical
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ADAU1701 or a USBi programmer connected. A USBi block is placed in the
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Hardware Configuration only because SigmaStudio requires a communication
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channel to compile; it is never used for a real download in this project.
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\end{drkey}
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\section{Hardware Configuration}
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\label{sec:ss-hwcfg}
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The Hardware Configuration tab must mirror the board exactly. The key
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settings are collected in Table~\ref{tab:ss-hwcfg}.
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\begin{table}[htbp]
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\centering
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\begin{tabular}{@{}ll@{}}
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\drhead Setting & Value \\
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\midrule
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Control port (I\textsuperscript{2}C address) & 0x34 (ADDR0/ADDR1 = GND) \\
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Self-boot & Disabled (host RAM load) \\
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System sample rate & 48\,kHz \\
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MCLK & 12.288\,MHz active oscillator \\
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Serial Input format & I\textsuperscript{2}S, 24-bit \\
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Serial Output & \textbf{Master Mode} (ADAU generates clocks) \\
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Word length & 24 bits \\
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RAM Modulo / Program Length & 1x (1024 instructions) \\
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\bottomrule
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\end{tabular}
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\caption{ADAU1701 hardware settings in SigmaStudio.}
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\label{tab:ss-hwcfg}
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\end{table}
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\subsection{Multipurpose pin (MP) assignment}
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The ADAU1701 multipurpose pins are assigned to the serial audio signals
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as wired on the board. Table~\ref{tab:ss-mp} lists the assignment; it
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matches the board GPIO map (Section~\ref{sec:hw-gpio}).
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\begin{table}[htbp]
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\centering
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\begin{tabular}{@{}lll@{}}
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\drhead MP pin & Direction / function & Signal \\
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\midrule
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MP0 & Input Sdata\_in0 & audio from Si4684 (radio) \\
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MP1 & Input Sdata\_in1 & audio from ESP32 \\
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MP4 & Input Lrclk\_in & LRCLK (returned via board link) \\
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MP5 & Input Bclk\_in & BCLK (returned via board link) \\
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MP6 & Output Sdata\_out0 & audio to FSC-BT1035 \\
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MP10 & Lrclk\_out & LRCLK generated (master) \\
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MP11 & Bclk\_out & BCLK generated (master) \\
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\bottomrule
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\end{tabular}
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\caption{Multipurpose pin assignment. MP2, MP3, MP7--MP9 are unused
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(GPIO input, default).}
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\label{tab:ss-mp}
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\end{table}
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\begin{drnote}[Master clock routing]
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The ADAU1701 is the I\textsuperscript{2}S master: it generates LRCLK and
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BCLK on MP10/MP11. On the board these are wired to MP4/MP5, so the same
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master clocks time the serial inputs. This shared-clock scheme means the
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serial inputs are configured as \emph{clock inputs} even though the ADAU
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itself is master --- the clocks originate at MP10/MP11 and return through
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the board link. All companion chips (Si4684, ESP32, BT1035) are
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I\textsuperscript{2}S slaves.
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\end{drnote}
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\section{Signal-processing chain}
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\label{sec:ss-chain}
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The audio flows through a fully stereo chain, built in the Schematic tab
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(Figure~\ref{fig:ss-chain}). Two stereo sources are level-trimmed, mixed,
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equalised, volume-controlled, and peak-limited before reaching the two
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digital outputs that feed the Bluetooth module.
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\begin{figure}[htbp]
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\centering
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\includegraphics[width=\linewidth]{sigma-chain.jpg}
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\caption{The complete stereo signal-processing chain in SigmaStudio:
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Input \(\rightarrow\) source faders \(\rightarrow\) stereo mixer
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\(\rightarrow\) parametric EQ \(\rightarrow\) master volume
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\(\rightarrow\) per-channel limiters \(\rightarrow\) outputs.}
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\label{fig:ss-chain}
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\end{figure}
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\subsection{Block-by-block}
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\begin{table}[htbp]
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\centering
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\small
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\begin{tabular}{@{}lll@{}}
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\drhead Stage & Block & Role \\
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\midrule
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Input & Input (ch. 2--5) & radio L/R, ESP32 L/R \\
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Source trim & Si4674, ESP32 faders & per-source stereo level \\
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Mix & Stereo Mixer & combine sources, keep L/R \\
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EQ & Parametric EQ (2-ch) & high-pass + 5 peaking bands \\
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Volume & Multiple volume (2-ch) & master volume \\
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Protect & Limiter 1 / Limiter 2 & per-channel peak limiting \\
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Output & Output (DIG0, DIG1) & L/R to FSC-BT1035 \\
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\bottomrule
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\end{tabular}
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\caption{Signal-processing blocks and their roles. The chain is stereo
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end to end; L and R never collapse to mono.}
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\label{tab:ss-blocks}
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\end{table}
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\subsection{Signal flow}
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\begin{drcode}[Signal flow (stereo)]
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Input ch2/3 (radio L/R) -> Si4674 fader --.
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|-> Stereo Mixer -> Param EQ
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Input ch4/5 (ESP32 L/R) -> ESP32 fader --'
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-> Master Volume -> Limiter L / Limiter R -> Output DIG0 / DIG1 -> BT1035
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\end{drcode}
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\section{Equaliser}
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\label{sec:ss-eq}
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The parametric EQ is a two-channel (stereo) block; a single set of bands
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applies identically to L and R. It is configured with one high-pass and
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five peaking bands, all starting flat (0\,dB) so the default response is
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neutral and any tone shaping is an explicit choice made at runtime by the
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firmware.
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\begin{table}[htbp]
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\centering
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\begin{tabular}{@{}lllll@{}}
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\drhead Band & Type & Frequency & Gain & Q \\
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\midrule
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1 & Butterworth High (high-pass) & 20\,Hz & --- & 1.41 \\
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2 & Peaking & 100\,Hz & 0\,dB & 1.0 \\
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3 & Peaking & 400\,Hz & 0\,dB & 1.0 \\
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4 & Peaking & 1\,kHz & 0\,dB & 1.0 \\
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5 & Peaking & 3\,kHz & 0\,dB & 1.0 \\
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6 & Peaking & 8\,kHz & 0\,dB & 1.0 \\
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\bottomrule
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\end{tabular}
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\caption{Parametric EQ bands. Band~1 removes DC and subsonic content;
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bands 2--6 are the tone controls the firmware adjusts.}
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\label{tab:ss-eq}
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\end{table}
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\begin{drnote}[Double precision for the high-pass]
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The high-pass sits at 20\,Hz, very low relative to the 48\,kHz sample
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rate, so it uses a double-precision second-order block to avoid
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coefficient-quantisation noise in the bass. The peaking bands can use
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single precision.
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\end{drnote}
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\section{Master volume and limiters}
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\label{sec:ss-vol}
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A two-channel volume block provides the master level (0\,dB default). Two
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single-channel limiters --- one per channel --- protect the FSC-BT1035
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input from clipping on peaks. Suggested limiter settings are in
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Table~\ref{tab:ss-lim}.
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|
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|
\begin{table}[htbp]
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||||||
|
\centering
|
||||||
|
\begin{tabular}{@{}ll@{}}
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||||||
|
\drhead Parameter & Value \\
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\midrule
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RMS TC & 50\,dB/s \\
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Decay & 12\,dB/s \\
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Threshold & $-1$\,dB (protective) \\
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\bottomrule
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\end{tabular}
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\caption{Per-channel limiter settings. The limiter is left fixed (not
|
||||||
|
runtime-adjustable).}
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||||||
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\label{tab:ss-lim}
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||||||
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\end{table}
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||||||
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|
||||||
|
\section{Runtime-controllable parameters}
|
||||||
|
\label{sec:ss-runtime}
|
||||||
|
|
||||||
|
The firmware controls a subset of the DSP at runtime via safeload writes.
|
||||||
|
These are the parameter cells whose addresses must be recorded from the
|
||||||
|
SigmaStudio export (Section~\ref{sec:ss-export}).
|
||||||
|
|
||||||
|
\begin{table}[htbp]
|
||||||
|
\centering
|
||||||
|
\begin{tabular}{@{}lll@{}}
|
||||||
|
\drhead Control & Block & Runtime-adjustable \\
|
||||||
|
\midrule
|
||||||
|
Source levels (2) & Si4674 / ESP32 faders & yes \\
|
||||||
|
EQ bands 2--6 & Parametric EQ & yes (gain/freq/Q) \\
|
||||||
|
Master volume & Multiple volume & yes \\
|
||||||
|
High-pass (band 1) & Parametric EQ & fixed \\
|
||||||
|
Limiters & Limiter 1 / 2 & fixed \\
|
||||||
|
\bottomrule
|
||||||
|
\end{tabular}
|
||||||
|
\caption{Parameters exposed to the firmware. Fixed blocks are set once
|
||||||
|
in the program and never written at runtime.}
|
||||||
|
\label{tab:ss-runtime}
|
||||||
|
\end{table}
|
||||||
|
|
||||||
|
\begin{drcaution}[Use safeload for live changes]
|
||||||
|
All runtime updates to the volume, source levels, and EQ bands must go
|
||||||
|
through the ADAU1701 safeload mechanism. Writing parameter cells directly
|
||||||
|
while audio is playing produces audible clicks.
|
||||||
|
\end{drcaution}
|
||||||
|
|
||||||
|
\section{Exporting the program}
|
||||||
|
\label{sec:ss-export}
|
||||||
|
|
||||||
|
With the schematic complete, the program is exported for the firmware:
|
||||||
|
|
||||||
|
\begin{enumerate}
|
||||||
|
\item Enable \emph{Action \(\rightarrow\) Enable Short Parameter Name
|
||||||
|
for Export} so the exported cell names are concise.
|
||||||
|
\item \emph{Action \(\rightarrow\) Export System Files}, and choose an
|
||||||
|
output folder.
|
||||||
|
\end{enumerate}
|
||||||
|
|
||||||
|
The export produces the program data (control registers, program RAM, and
|
||||||
|
parameter RAM) as byte sequences, plus the symbolic parameter addresses.
|
||||||
|
The firmware's ADAU1701 driver replays the program data over
|
||||||
|
I\textsuperscript{2}C at boot, and uses the parameter addresses for
|
||||||
|
safeload updates.
|
||||||
|
|
||||||
|
\begin{drnote}[No download needed]
|
||||||
|
Since there is no ADAU1701 attached during development, do \emph{not} use
|
||||||
|
\emph{Link Compile Download} (it would fail trying to reach the chip).
|
||||||
|
\emph{Export System Files} compiles the schematic and writes the files
|
||||||
|
directly.
|
||||||
|
\end{drnote}
|
||||||
@@ -44,6 +44,7 @@
|
|||||||
% ---------------- Chapters ----------------
|
% ---------------- Chapters ----------------
|
||||||
\include{ch-intro}
|
\include{ch-intro}
|
||||||
\include{ch-hardware}
|
\include{ch-hardware}
|
||||||
|
\include{ch-sigmastudio}
|
||||||
\include{ch-firmware}
|
\include{ch-firmware}
|
||||||
\include{ch-si4684}
|
\include{ch-si4684}
|
||||||
\include{ch-api}
|
\include{ch-api}
|
||||||
|
|||||||
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Reference in New Issue
Block a user