Fix agent (Cursor) rules
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# instructions.md — DigiRadio firmware, agent kickoff
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Read this together with `AGENTS.md` and everything under
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`.cursor/rules/`. Those define *how* to write code; this file defines
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*what we are building* and *what to do first*.
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## What DigiRadio is
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An open-source Hi-Fi DAB+/FM digital radio board. Firmware runs on an
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ESP32-S3 and coordinates three companion chips:
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- **Si4684** — DAB+/FM tuner (delivers the audio stream).
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- **ADAU1701** — SigmaDSP: equaliser + input mixer between the Si4684
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and the ESP32 audio path. Program is written to DSP RAM at every boot
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(no self-boot EEPROM).
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- **FSC-BT1035 (QCC3056)** — Bluetooth 5.2 out with aptX Adaptive,
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controlled by AT commands over UART.
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Plus: an elegant, essential web UI for network configuration; encrypted
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storage for Wi-Fi and user credentials and the station list.
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Repository: https://github.com/manvalan/DigiRadio
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## Confirmed technical decisions (do not re-litigate)
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| Area | Decision |
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|-------------|-------------------------------------------------------|
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| Framework | ESP-IDF v5.5.x (native, not Arduino) |
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| Language | C++23, pinned `-std=gnu++23` |
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| Errors | `std::expected<T, Error>` (native); exceptions OFF |
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| DSP boot | ESP32 writes ADAU1701 RAM at every boot (no EEPROM) |
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| Architecture| Functional core (pure, host-tested) + imperative shell|
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| Docs | Doxygen, build must exit 0 (enforced) |
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| HW licence | CERN-OHL-S v2 · FW licence: Apache-2.0 |
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## Working agreement
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- **Confirm understanding before writing code.** On kickoff, summarise
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the plan and list any blockers or unclear hardware invariants first.
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- **Blockers first**, always. State risks before solutions.
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- **One vertical slice at a time.** `main` always builds and runs.
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- Every file gets the Apache header; every class/method its doc block;
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`doxygen Doxyfile` stays green. Small commits, 50/72 messages.
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- Never invent a register/opcode/boot step — cite the datasheet or stop.
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## Roadmap (slices, in order)
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1. **Walking skeleton** — boot, a task, SoftAP, web server, one JSON
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endpoint, one host test, docs green. No chip drivers yet. (Spec below.)
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2. Secure store (`ISecureStore`) + Wi-Fi provisioning UI (STA join).
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3. Station/frequency list model + persistence + UI.
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4. Si4684 driver: power-up, load image, tune, read RSQ.
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5. ADAU1701 driver: RAM boot, then safeload EQ + input mixer.
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6. FSC-BT1035 driver: AT init (incl. `AT+AUXCFG=1`), audio out.
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7. Integration: TunerService + AudioService end to end.
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## Slice 1 — Walking skeleton (the first task)
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Goal: exercise the whole toolchain end to end with zero chip hardware,
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so every later slice drops into a working frame.
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Build:
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- Top-level ESP-IDF project targeting `esp32s3`.
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- `sdkconfig.defaults` sets C++23, exceptions off, and the flash/NVS
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encryption options (leave encryption keys/enablement documented, not
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hard-enabled, until we decide on the secure-store slice).
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- The `components/core` component compiles both under ESP-IDF and
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standalone on the host.
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Behaviour:
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- `app_main` starts a FreeRTOS task that logs a heartbeat on a timer.
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- Bring up SoftAP with a known SSID (e.g. `DigiRadio-setup`).
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- Start an HTTP server serving one minimal gzipped page from flash.
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- Expose `GET /api/health` returning a typed DTO serialised by the pure
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core, e.g. `{"status":"ok","fw":"0.1.0"}`.
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Acceptance criteria:
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- [ ] `idf.py build` succeeds; `flash monitor` shows the heartbeat.
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- [ ] A phone/laptop can join the SoftAP, load the page, and get a valid
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JSON response from `/api/health`.
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- [ ] The health DTO is defined and serialised in `components/core`,
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with a host unit test that passes under `ctest`.
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- [ ] `doxygen Doxyfile` exits 0 with an empty warnings log.
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- [ ] Every file has the Apache header; every class/method its doc block.
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- [ ] No ESP-IDF headers included from `components/core`.
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Out of scope for Slice 1: any Si4684 / ADAU1701 / BT1035 code, real
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credentials, encryption enablement. Those come in later slices.
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## First message to the agent
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Ask it to read `AGENTS.md`, `.cursor/rules/`, and this file, then
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respond with: (1) the confirmed stack, (2) the exact repo layout it will
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create, (3) how it will satisfy each Slice 1 acceptance criterion, and
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(4) any blockers or questions — **before** writing code.
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